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Re:5nm vs. 3nm by baybal2 on Tuesday June 25, 2019 @01:03AM (#20271339)
> There are fewer foundries to choose from at the most advanced nodes

To the effect, only two. It is surprising just how fast it has turned into a duopoly.

Samsung and TSMC are now the Airbus and Boeing of semiconductor industry

Re:5nm vs. 3nm by Etheryte on Tuesday June 25, 2019 @01:11AM (#20271368)
> The cost to design a 3nm device ranges from $500 million to $1.5 billion, according to IBS. Process development costs ranges from $4 billion to $5 billion, while a fab runs $15 billion to $20 billion, according to IBS.

At these scales, very few players can afford to play, even if a breakthrough could net you a very comfortable position for many years.

Re:5nm vs. 3nm by teraflop on Tuesday June 25, 2019 @01:19AM (#20271403)
Out of curiosity, do you know what factors are mainly driving the costs so high?

Thinking about it naively, I can guess at a few possibilities:

- it's highly labor-intensive

- it requires highly specialized skills that command incredibly high prices on the labor market

- it requires lots of prototyping iterations that require expensive materials

- the prototypes are produced on machinery with high opportunity costs

- IP licensing costs

I'm wondering if one of these in particular is the dominant cause, or if it's all of them in conjunction, or if there are other major factors I'm not thinking of.

Re:5nm vs. 3nm by pkaye on Tuesday June 25, 2019 @02:51AM (#20271730)
I used to work on R&D on development of those expensive FAB machines. There was lots of expensive materials to meet extreme requirements. The process chambers were hot with corrosive gases. For example you couldn't use cheap o-rings. Instead of $30 standard o-rings, we would need $3000 chemical resistant o-rings that don't disintegrate with time. You had to trace down minute sources of contamination. And there was lots of iterations of prototyping to get things just right.
Re:5nm vs. 3nm by brennanpeterson on Tuesday June 25, 2019 @08:17AM (#20273434)
A process cost is basically the 2 years of Fab time. And a Fab is expensive due to the capital equipment (your opportunity cost). A 10B Fab Costa about 2B per year, thus process development is 4B.

I think those design costs are nonsensical. There are major projects done by groups of 100 or fewer engineers. A really unique design can cost that much, but a licensed design built.on standard cells is less. That is how rocketchip, RiscV, and others get by. As an approximation, every M$ is 2 engineer years. A 100M$ design is...200 engineer years. With an ARM license and other IP, that is likely manageable.

There is a large infrastructure of design tools that keep design costs constrained per design. Fab costs are not so easily limited....

Re:5nm vs. 3nm by klyrs on Tuesday June 25, 2019 @08:02AM (#20273334)
Lithography is actually a huge challenge, and is becoming extremely complex

https://semiengineering.com/7nm-fab-challenges/

Re:5nm vs. 3nm by ekianjo on Tuesday June 25, 2019 @02:20AM (#20271627)
the cost of highly specialized machinery is certainly a big driver. Plus that machinery is basically thrown away every time you go to a thinner process.

Also, figuring out how to maximize yields to an acceptable level must be a lot of experimentation.

Re:5nm vs. 3nm by avian on Tuesday June 25, 2019 @02:54AM (#20271738)
Definitely not thrown away. Plenty of stuff still gets made on older processes. Fabs keep old lines alive for a long time, especially since each one is such a huge investment.
Re:5nm vs. 3nm by tracker1 on Tuesday June 25, 2019 @03:39PM (#20278043)
Today's R7 process is 2025's RPi.
Re:5nm vs. 3nm by JudgeWapner on Tuesday June 25, 2019 @01:41PM (#20276764)
I just quit a gig at a semiconductor supplier that makes EUV light. Keep in mind this is just one major component in the chain:

- EUV comes from a plasma of metal created in a vacuum chamber.

- the plasma is created by concentrating a beam of light on a tiny pellet of molten metal

- that beam of light is a 25kw laser, which is borderline weapons-grade. To the point that countries hesitate to even allow it to be imported.

- the laser must be pulsed precisely to vaporize the metal as its flying through the chamber

- residue from the metal vapor quickly builds up and deteriorates the process

getting this stuff to work requires armies of engineers and scientists. the machines themselves are the size of a tour bus.

Re:5nm vs. 3nm by p1esk on Tuesday June 25, 2019 @01:18AM (#20271395)
Intel is still ahead of them, right? Last I’ve heard they are moving pretty aggressively on their “7nm”, which is supposed to be at least as good as TSMC’s “5nm”.

Compare min metal pitch for Intel’s “10nm” (36nm) and TSMC’s “7nm” (40nm) [1]

[1] https://en.wikichip.org/wiki/10_nm_lithography_process

Re:5nm vs. 3nm by eight_ender on Tuesday June 25, 2019 @01:40AM (#20271467)
They've yet to master their own 10nm process let alone 7nm. I don't doubt their processes outdo the competitors on actual die shrinkage but they've been having a hell of a time of it.
Re:5nm vs. 3nm by Goz3rr on Tuesday June 25, 2019 @03:42AM (#20271940)
The problem with 10nm is that they were too ambitious and tried to do it without EUV. 7nm is being developed by a different team and does use EUV so it shouldn't suffer from the same delays.
Re:5nm vs. 3nm by seanmcdirmid on Tuesday June 25, 2019 @01:51AM (#20271509)
From what I understand they are not really comparable like that. It’s like clock speed, there are a lot of games that can be played, and X 10nm can be much better than Y 7nm.
Re:5nm vs. 3nm by TomVDB on Tuesday June 25, 2019 @01:35AM (#20271447)
What does it mean to be ahead in 7nm when you are years behind in getting your 10nm process into acceptable yielding mass production?
Re:5nm vs. 3nm by rusticpenn on Tuesday June 25, 2019 @03:53AM (#20271991)
There are two technologies used in etching, UV and EUV. UV was designed for nodes upto 40 nm (approx). EUV can be used with accuracy of 13nm. EUV has been under development for more than a decade in several firms, so companies used several trickes to make use of UV for lower sizes. 10nm is the extreme end of it (I guess). For EUV this is standard range. It should work without any issues until 5nm and then special tricks would be used to make the pitch smaller.

So manufacturing 10n, with UV is much harder than manufacturing 7nm with EUV (although it is more expensive).

Re:5nm vs. 3nm by Confusion on Tuesday June 25, 2019 @04:42AM (#20272203)
Yup, back in 2003 I was doing experimental work on creating better EUV mirrors and the amount of reflection achieved was way too low to support any machine with a design similar to UV machines. You needed either a (much) higher intensity source or fewer mirrors.

I've been out of that loop for a while, so I don't know how the design of the EUV machines turned out.

Re:5nm vs. 3nm by ragebol on Tuesday June 25, 2019 @05:27AM (#20272428)
AFAIK, some (less than?) 2% of energy put into the EUV source ends up at the wafer. The EUV-source has been the biggest struggle for ASML from what I gathered in media.

Apparently, tiny droplets of tin are created by spinning some disk(s) and then those droplets are zapped with with a laser before they emit EUV. Those machines are crazy complex.

Re:5nm vs. 3nm by Dylan16807 on Thursday June 27, 2019 @04:44AM (#20292721)
UV is under 1%, and EUV is under .01%
Re:5nm vs. 3nm by kingosticks on Tuesday June 25, 2019 @04:51AM (#20272250)
But don't TSMC use UV right now for their process? If so, UV vs EUV can't be the only reason for the mess they've gotten themselves in.
Re:5nm vs. 3nm by p1esk on Tuesday June 25, 2019 @01:47AM (#20271493)
I don’t see why they can’t be both behind on “10nm” and ahead on “7nm”.
Re:5nm vs. 3nm by benj111 on Tuesday June 25, 2019 @02:46AM (#20271708)
True, but they seem to have been ahead on 10nm until they weren't, which calls into question claims about 7nm.

Then there's the question of why they aren't skipping 10nm if 7nm is so ahead.

And theres the question of why they can't 'scale up' their 7nm to do 10nm.

Re:5nm vs. 3nm by earenndil on Tuesday June 25, 2019 @03:45PM (#20278106)
Presumably 10nm is cheaper to produce, so they can use that to make lower-end processors.
Re:5nm vs. 3nm by paulddraper on Tuesday June 25, 2019 @02:38AM (#20271684)
Yes, they are substantially different processes.
Re:5nm vs. 3nm by vbezhenar on Tuesday June 25, 2019 @06:06AM (#20272632)
I don't think that Intel is ahead of them. TSMC already started risk production of 5nm chips and plans to start high-volume manufacturing in 2020[0]. According to Intel roadmap they plan to launch 7nm product in 2021 (GPU)[1].

[0] https://www.anandtech.com/show/14175/tsmcs-5nm-euv-process-t...

[1] https://www.anandtech.com/show/14312/intel-process-technolog...

Re:5nm vs. 3nm by gjm11 on Tuesday June 25, 2019 @08:21AM (#20273460)
Although "5nm" and "7nm" look like physical measurements, they aren't; all they are is marketing labels, and the only thing you can be somewhat confident of is that if a single company has one process they call "5nm" and one they call "7nm" then the "5nm" one probably has physically smaller features and greater density of components on chip.

And although "2020" and "2021" look like actual dates, they aren't; all they are is marketing labels, because saying you're going to do something in 2020 is cheap.

So what we know is that TSMC say they are going to begin volume manufacturing of "5nm" chips in "2020" (reality: at some unknown date they will be making large quantities of chips on a process to which they have found it convenient to attach the label "5nm"), and that Intel say they are going to launch "7nm" chips in "2021" (reality: at some unknown date they will be making unknown quantities of chips on a process to which they have found it convenient to attach the label "7nm").

Whether TSMC's "2020" is really earlier than Intel's "2021", and whether TSCM's "5nm" is really denser than Intel's "7nm", who knows?

(I'd guess TSMC are in fact ahead, but this isn't a field where you want to be trusting manufacturers' announcements much.)

Re:5nm vs. 3nm by TA4557384 on Wednesday June 26, 2019 @04:53AM (#20283076)
For what it's worth, the presentation we got from our vendor was 2020 for first 5nm silicon from TSMC.
Re:5nm vs. 3nm by bhouston on Tuesday June 25, 2019 @06:35AM (#20272764)
> Samsung and TSMC are now the Airbus and Boeing of semiconductor industry

Then what is Intel?

Re:5nm vs. 3nm by avs733 on Tuesday June 25, 2019 @07:50AM (#20273249)
McDonnell Douglas or maybe Hughes Aerospace?
Re:5nm vs. 3nm by choonway on Tuesday June 25, 2019 @07:20AM (#20273033)
Lockheed Martin?