There are two technologies used in etching, UV and EUV. UV was designed for nodes upto 40 nm (approx). EUV can be used with accuracy of 13nm. EUV has been under development for more than a decade in several firms, so companies used several trickes to make use of UV for lower sizes. 10nm is the extreme end of it (I guess). For EUV this is standard range. It should work without any issues until 5nm and then special tricks would be used to make the pitch smaller.

So manufacturing 10n, with UV is much harder than manufacturing 7nm with EUV (although it is more expensive).

Yup, back in 2003 I was doing experimental work on creating better EUV mirrors and the amount of reflection achieved was way too low to support any machine with a design similar to UV machines. You needed either a (much) higher intensity source or fewer mirrors.

I've been out of that loop for a while, so I don't know how the design of the EUV machines turned out.

AFAIK, some (less than?) 2% of energy put into the EUV source ends up at the wafer. The EUV-source has been the biggest struggle for ASML from what I gathered in media.

Apparently, tiny droplets of tin are created by spinning some disk(s) and then those droplets are zapped with with a laser before they emit EUV. Those machines are crazy complex.

UV is under 1%, and EUV is under .01%

But don't TSMC use UV right now for their process? If so, UV vs EUV can't be the only reason for the mess they've gotten themselves in.

I don’t see why they can’t be both behind on “10nm” and ahead on “7nm”.

True, but they seem to have been ahead on 10nm until they weren't, which calls into question claims about 7nm.

Then there's the question of why they aren't skipping 10nm if 7nm is so ahead.

And theres the question of why they can't 'scale up' their 7nm to do 10nm.

Presumably 10nm is cheaper to produce, so they can use that to make lower-end processors.

Yes, they are substantially different processes.