Yup, back in 2003 I was doing experimental work on creating better EUV mirrors and the amount of reflection achieved was way too low to support any machine with a design similar to UV machines. You needed either a (much) higher intensity source or fewer mirrors.
I've been out of that loop for a while, so I don't know how the design of the EUV machines turned out.
AFAIK, some (less than?) 2% of energy put into the EUV source ends up at the wafer. The EUV-source has been the biggest struggle for ASML from what I gathered in media.
Apparently, tiny droplets of tin are created by spinning some disk(s) and then those droplets are zapped with with a laser before they emit EUV. Those machines are crazy complex.
Re:5nm vs. 3nm
by Dylan16807 on Thursday June 27, 2019 @04:44AM
(#20292721)
UV is under 1%, and EUV is under .01%
Re:5nm vs. 3nm
by kingosticks on Tuesday June 25, 2019 @04:51AM
(#20272250)
But don't TSMC use UV right now for their process? If so, UV vs EUV can't be the only reason for the mess they've gotten themselves in.
So manufacturing 10n, with UV is much harder than manufacturing 7nm with EUV (although it is more expensive).