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Re:Apple Silicon M1: Black Magic Fuckery by darren_ on Tuesday November 24, 2020 @06:51PM (#25204401)
This quote doesn’t really cover why M1 macs are more efficient with less ram than intel macs? You’ve got a memory budget, it’s likely broadly the same on both platforms, the speed at which your retains/releases happen isn’t going to be the issue. it’s not like intel macs use GC where m1 uses RC.

(It explains why iOS does better with less ram than android, but the quote is specifically claiming this as a reason for 8GB ram to be acceptable)

Re:Apple Silicon M1: Black Magic Fuckery by notriskfree on Wednesday November 25, 2020 @03:06AM (#25206950)
I doubt the M1 macs are really using memory much more efficiently; the stock M1 macs with 8GB were available rapidly; the Macs with 16GB ram or larger disk space had a three to four week delay when ordering; a lot of enthusiasts and influencers rushed out and got base models; they are then surprised to find they can work ok in most apps with only 8GB.

Perhaps they never really needed to fit 32GB into their intel macs either. Some days after the glowing reviews; and strange comments about magic memory utilization; we now see comments concerned about SSD wear due to swap file usage.

If the applications and data structures are more compact in memory on the arm processors; it should be easy to test; you just need an intel mac; and an M1 mac running the same app on the same document and look at how much memory it uses.

Re:Apple Silicon M1: Black Magic Fuckery by joking on Wednesday November 25, 2020 @03:59AM (#25207247)
When you need 32 or 64gb of ram is not because the data structures or the programs you use need memory, it's because the data they use (database content, virtual machines, images, videos, music... ) fill that ram, and those data is not going to occupy less on an arm machine.
Re:Apple Silicon M1: Black Magic Fuckery by Twisell on Wednesday November 25, 2020 @05:01AM (#25207587)
However real case usage of such massive amount of data are limited for typical desktop user. Massive database load usually happen on specialized servers in which 256Go RAM and more are pretty mundane.

So on customer PC ram is maybe more used as caching mechanisms or eaten away by poorly designed memory leak/garbage collection.

And if your GPU is able do to real time rendering on data heavy load maybe you need less caching of intermediate results as well.

Re:Apple Silicon M1: Black Magic Fuckery by Maxion on Wednesday November 25, 2020 @05:54AM (#25207914)
Plenty of use cases for more than 8gb of ram. When you're doing data analysis on even smaller datasets you may need several times more available memory than the size of the dataset as you're processing it.
Re:Apple Silicon M1: Black Magic Fuckery by Twisell on Wednesday November 25, 2020 @06:10AM (#25208018)
1.Again typical use case for entry level PC is not data analysis on bigdata.

2.My current production server is a PostgreSQL database on a 16GB RAM VM running on Debian (my boss is stingy). This doesn't prevent me from managing a 300GB+ data cluster with pretty decent performances and perform actual data analysis.

3.If Chrome sometimes use +8GB for a godsake webrowser the only explanation is poor design, there is no excuse.

Re:Apple Silicon M1: Black Magic Fuckery by llampx on Wednesday November 25, 2020 @05:36PM (#25215052)
"Nobody needs more than 640k of RAM"
Re:Apple Silicon M1: Black Magic Fuckery by joking on Thursday November 26, 2020 @08:07AM (#25219704)
that was not my point, my point was that if you need it, you will need it regardless of the architecture.
Re:Apple Silicon M1: Black Magic Fuckery by Joeri on Wednesday November 25, 2020 @12:51PM (#25211975)
I think you’re right. I’ve only ever needed 32 gb when I was running a local hadoop cluster for development. Those virtual images required the same amount of ram regardless of OS.
Re:Apple Silicon M1: Black Magic Fuckery by blihp on Tuesday November 24, 2020 @07:40PM (#25204719)
It's a contributing factor. If things like retain/release are fast and you have significantly more memory bandwidth and low latency to throw at the problem, you can get away without preloading and caching nearly as much. Take something simple like images on web pages: don't bother keeping hundreds (thousands?) of decompressed images in memory for all of the various open tabs. You can just decompress them on the fly as needed when a tab becomes active and then release them when it goes inactive and/or when the browser/system determines it needs to free up some memory.
Re:Apple Silicon M1: Black Magic Fuckery by kllrnohj on Tuesday November 24, 2020 @08:33PM (#25205049)
You've completely changed the scope of what's being discussed, though. Retain/release being faster would just surface as regular performance improvements. It won't change anything at all about how an existing application manages memory.

It's possible that apps have been completely overhauled for a baseline M1 experience. Extremely, extraordinarily unlikely that anything remotely of the sort has happened, though. And since M1-equipped Macs don't have any faster IO than what they replaced (disk, network, and RAM speeds are all more or less the same), there wouldn't be any reason for apps to have done anything substantially difference.

Re:Apple Silicon M1: Black Magic Fuckery by Twisell on Wednesday November 25, 2020 @05:06AM (#25207622)
From the original article:

Third, Marcel Weiher explains Apple’s obsession about keeping memory consumption under control from his time at Apple as well as the benefits of reference counting:

>where Apple might have been “focused” on performance for the last 15 years or so, they have been completely anal about memory consumption. When I was there, we were fixing 32 byte memory leaks. Leaks that happened once. So not an ongoing consumption of 32 bytes again and again, but a one-time leak of 32 bytes.

>The benefit of sticking to RC is much-reduced memory consumption. It turns out that for a tracing GC to achieve performance comparable with manual allocation, it needs several times the memory (different studies find different overheads, but at least 4x is a conservative lower bound). While I haven’t seen a study comparing RC, my personal experience is that the overhead is much lower, much more predictable, and can usually be driven down with little additional effort if needed.

Re:Apple Silicon M1: Black Magic Fuckery by kllrnohj on Wednesday November 25, 2020 @08:19AM (#25208883)
But again that didn't change with M1. We're talking MacOS vs. MacOS here. Your quote is fully irrelevant to what's being discussed which is the outgoing 32gb macbook vs the new 16gb-max ones. They are running the same software. Using the same ObjC & Swift reference counting systems.
Re:Apple Silicon M1: Black Magic Fuckery by Twisell on Wednesday November 25, 2020 @10:25AM (#25210145)
We've run full circle there

ARC is not specific to M1, BUT have been widely used in ObjC & Swift for years AND is thus heavily optimized on M1 that perform "retain and release" way faster (even when emulating x86)

Perfect illustration of Apple software+hardware long term strategy.

Re:Apple Silicon M1: Black Magic Fuckery by nemothekid on Wednesday November 25, 2020 @11:56AM (#25211312)
That still doesn't mean that M1 Macs use less memory. If retain/release is faster then the M1 Macs have higher performance than Intel Macs. That is easily understood. The claim under contention here is that M1 Macs use less memory, which is not explained by hardware optimized atomic operations
Re:Apple Silicon M1: Black Magic Fuckery by Twisell on Wednesday November 25, 2020 @04:26PM (#25214478)
And I never stated that. It's just more optimized.
Re:Apple Silicon M1: Black Magic Fuckery by nemothekid on Wednesday November 25, 2020 @04:55PM (#25214715)
Ok. However the posts in this thread were asking how the M1 Macs could use less RAM than Intel Macs, not if they were more optimized. The GP started with:

>This quote doesn’t really cover why M1 macs are more efficient with less ram than intel macs? You’ve got a memory budget, it’s likely broadly the same on both platforms

Re:Apple Silicon M1: Black Magic Fuckery by Twisell on Wednesday November 25, 2020 @05:21PM (#25214936)
Well, if less memory is used to store garbage thanks to RC, less memory is needed. But that was largely discussed in other sub-comments hence why we focused more on the optimisation aspect in this thread.
Re:Apple Silicon M1: Black Magic Fuckery by nemothekid on Wednesday November 25, 2020 @05:24PM (#25214959)
>Well, if less memory is used to store garbage thanks to RC, less memory is needed

But both Intel Macs and ARM Macs use RC. Both chips are running the same software.

Re:Apple Silicon M1: Black Magic Fuckery by ajuc on Wednesday November 25, 2020 @05:47AM (#25207859)
Aren't most big desktop apps like office on PC still written in C++? Same with almost all AAA games. And the operating system itself.

Browsers are written in C++ and javascript has full-blown GC.

I don't see how refcounting gives you advantage over manual memory management for most users.

Re:Apple Silicon M1: Black Magic Fuckery by jml7c5 on Tuesday November 24, 2020 @07:58PM (#25204832)
Decompression is generally bound by CPU speed, not memory bandwidth or latency.
Re:Apple Silicon M1: Black Magic Fuckery by blihp on Tuesday November 24, 2020 @08:15PM (#25204919)
CPU speed is often bound by memory bandwidth and latency... it's all related. If you can't keep the CPU fed, it doesn't matter how fast it is theoretically.
Re:Apple Silicon M1: Black Magic Fuckery by jml7c5 on Tuesday November 24, 2020 @09:03PM (#25205199)
What I mean is that (to my understanding) memory bandwidth in modern devices is already high enough to keep a CPU fed during decompression. Bandwidth isn't a bottleneck in this scenario, so raising it doesn't make decompression any faster.
Re:Apple Silicon M1: Black Magic Fuckery by accountofme on Tuesday November 24, 2020 @11:48PM (#25206129)
RAM bandwidth limitations (latency and throughput) are generally hidden by the multiple layers of cache in between the ram and CPU prefetching more data than is generally needed. Having memory on chip could make the latency less, but as ATI has shown with HBM memory on a previous generation of its GPUs its not a silver bullet solution.

I am going to speculate now, but maybe, just maybe, if some of the silicon that apple has used on the M1 is used for compression/decompression they could be transparently compressing all ram in hardware. Since this offloaded from the CPUs and allows a compressed stream of data from memory, they achieve greater ram bandwidth, less latency and less usage for a given amount of memory. If this is the case I hope that the memory has ECC and/or the compression has parity checking....

Re:Apple Silicon M1: Black Magic Fuckery by spideymans on Wednesday November 25, 2020 @09:06AM (#25209323)
> I am going to speculate now, but maybe, just maybe, if some of the silicon that apple has used on the M1 is used for compression/decompression they could be transparently compressing all ram in hardware. Since this offloaded from the CPUs and allows a compressed stream of data from memory, they achieve greater ram bandwidth, less latency and less usage for a given amount of memory.

Are you aware of any x86 chips that utilize this method?

Re:Apple Silicon M1: Black Magic Fuckery by accountofme on Sunday November 29, 2020 @10:25AM (#25245615)
Not that I am aware. I remember seeing apple doing something it in software with the intel macs. Which is why I speculated about it being hardware for M1.

Cheers

Re:Apple Silicon M1: Black Magic Fuckery by eesmith on Wednesday November 25, 2020 @02:23AM (#25206727)
> Blosc [...] has been designed to transmit data to the processor cache faster than the traditional, non-compressed, direct memory fetch approach via a memcpy() OS call. Blosc is the first compressor (that I'm aware of) that is meant not only to reduce the size of large datasets on-disk or in-memory, but also to accelerate memory-bound computations (which is typical in vector-vector operations).

https://blosc.org/pages/blosc-in-depth/

Re:Apple Silicon M1: Black Magic Fuckery by rodgerd on Tuesday November 24, 2020 @08:16PM (#25204932)
I can't speak to the MacOS system, but from years spent JVM tuning: you're in a constant battle finding the right balance of object creation/destruction (the former burning CPU, the latter creating garbage), keeping memory use down (more collection, which burns CPU and can create pauses and hence latency), or letting memory balloon (which can eat resource, and makes the memory sweeps worse when they finally happen).

Making it cheaper to create and destroy objects with hardware acceleration, and to do many small, low-cost reclaims without eating all your CPU would be a magical improvement to the JVM, because you could constrain memory use without blowing out CPU. From what's described in TFA it sounds like the same is true for modern MacOS programming.

Re:Apple Silicon M1: Black Magic Fuckery by thu2111 on Thursday November 26, 2020 @04:23AM (#25218324)
Manual memory management isn't magic and speeding up atomic ops doesn't fundamentally change anything. People have to spend time tuning memory management in C++ too, that's why the STL has so many ways to customise allocators and why so many production C/C++ codebases roll custom management schemes instead of using malloc/free. They're just expensive and slow so manual arena destruction etc is often worth it.

The JVM already makes it extremely cheap to create and destroy objects: creation is always ~free (just a pointer increment), and then destruction is copying, so very sensitive to memory bandwidth but done in parallel. If most of your objects are dying young then deallocation is "free" (amortized over the cost of the remaining live objects). Given the reported bandwidth claims for the M1 if they ever make a server version of this puppy I'd expect to see way higher GC throughput on it too (maybe such a thing can be seen even on the 16GB laptop version).

The problem with Java on the desktop is twofold:

1. Versions that are mostly used don't give memory back to the OS even if it's been freed by the collector. That doesn't start happening by default until like Java 14 or 15 or so, I think. So your memory usage always looks horribly inflated.

2. If you start swapping it's death because the GC needs to crawl all over the heap.

There are comments here saying the M1 systems rely more heavily on swap than a conventional system would. In that case ARC is probably going to help. At least unless you use a modern pauseless GC where relocation is also done in parallel. Then pausing background threads whilst they swap things in doesn't really matter, as long as the app's current working set isn't swapped out to compensate.

Re:Apple Silicon M1: Black Magic Fuckery by valuearb on Wednesday November 25, 2020 @11:12AM (#25210735)
Yea, this is a BS theory. I have a 16Gb M1 MacBook Air and the real answer is that it has super fast SSD access, so you don’t notice the first few gigabytes of swap.

But when swap hits 8-9 Gb, it’s effects start to get very noticeable.

Re:Apple Silicon M1: Black Magic Fuckery by Decade on Wednesday November 25, 2020 @04:23PM (#25214450)
This seems correct. RC vs GC might explain how a Mac full of NSObjects needs less memory than a Windows full of .NET runtimes, but it doesn’t explain how M1 Mac with 16GB of RAM is faster than x86 Mac with 16GB or more of RAM.

Besides, a lot of memory usage is in web browsers, which must use garbage collection.

Looking at the reviews of M1 Macs, those systems are still responsive and making forward progress at a “memory pressure” that would make my x86 Mac struggle in a swap storm. It seems to come down to very fast access to RAM and storage, large on-die caches, and perhaps faster memory compression.

Re:Apple Silicon M1: Black Magic Fuckery by tedd4u on Wednesday November 25, 2020 @10:12PM (#25216503)
Oh one more thing, they said in the Apple Silicon event that they had eliminated a lot of the need for copying RAM around so … could be some actual footprint reduction there?
Re:Apple Silicon M1: Black Magic Fuckery by tedd4u on Wednesday November 25, 2020 @09:05PM (#25216227)
I tend to agree! I think Big Sur on M1 uses 16kB page size vs 4kB on Intel so maybe that contributes to more efficient / less obvious perf issue when swapping.
Re:Apple Silicon M1: Black Magic Fuckery by gameswithgo on Tuesday November 24, 2020 @07:34PM (#25204675)
yeah its a bit of a stretch. to the extent that macos apps use garbage collection less than pc apps it would need less ram. but they are kinda hopping around a macos vs android comparison which makes no sense. I think mac enthusiasts trying to imagine why a max of 8 or 16gb is ok. it is ok for most people anyway.
Re:Apple Silicon M1: Black Magic Fuckery by kllrnohj on Tuesday November 24, 2020 @08:37PM (#25205072)
It also would have no difference between the outgoing Intel ones and the incoming Apple Silicon ones. Same pointer sizes, same app memory management, etc... Some fairly minor differences in overall binary sizes, so no "wins" there or anything either.
Re:Apple Silicon M1: Black Magic Fuckery by cormacrelf on Wednesday November 25, 2020 @08:01AM (#25208747)
All Swift/ObjC software has been doing ARC for ten (?) years. Virtual memory usage will be the same under M1. It will just pay off in being faster to refcount (ie as fast as it already is on an iPhone), and therefore the same software runs faster. Probably won't work under Rosetta 2 with the per-thread Total Store Ordering switch. And it's probably not specific to NSObject, any thread safe reference counter will benefit. There are more of those everywhere these days.

2 more points:

- All the evidence I've seen is gifs of people opening applications in the dock, which is... not impressive. I can do that already, apps barely allocate at all when they open to "log in to iCloud" or "Safari new tab". And don't we see that literally every time Apple launches Mac hardware? Sorry all tech reviewers everywhere, try measuring something.

- I think the actual wins come from the zillion things Apple has done in software. Like: memory compression, which come to think of it might be possible to do in hardware. Supposedly a lot of other work/tuning done on the dynamic pager, which is maybe enabled by higher bandwidth more than anything else.

Fun fact: you can stress test your pager and swap with `sudo memory_pressure`. Try `-l critical`. I'd like to see a benchmark comparing THAT under similar conditions with the previous generation.

Re:Apple Silicon M1: Black Magic Fuckery by Recurecur on Wednesday November 25, 2020 @10:07AM (#25209973)
You might try reading the article. One example was a large software build taking ~25% less time on a 13" MBP than on a 12-core Mac Pro.

I'm curious about FP/vector performance, but I'm pretty sure it's fine. I'm definitely eyeing a MBP myself! 20 hours of video playback? Crazy...

Re:Apple Silicon M1: Black Magic Fuckery by cormacrelf on Thursday November 26, 2020 @04:13AM (#25218284)
Right, which wasn't a test of the purportedly increased ability to work in high memory pressure at all.
Re:Apple Silicon M1: Black Magic Fuckery by jb1991 on Wednesday November 25, 2020 @03:11AM (#25206974)
> macos vs android comparison which makes no sense.

Because the M1 is similar to the chips used in iOS, hence the comparison is not inappropriate.

Re:Apple Silicon M1: Black Magic Fuckery by gameswithgo on Wednesday November 25, 2020 @09:37AM (#25209624)
all comparisons are appropriate, but the question here was whether the mac laptops memory limits were somehow made better by more efficient use of memory. they are not. these are laptops, not phones or tablets. memory is used as efficiently as in previous laptops.
Re:Apple Silicon M1: Black Magic Fuckery by nojito on Tuesday November 24, 2020 @07:00PM (#25204461)
The quote right after explains your concerns.

>The memory bandwidth on the new Macs is impressive. Benchmarks peg it at around 60GB/sec–about 3x faster than a 16” MBP. Since the M1 CPU only has 16GB of RAM, it can replace the entire contents of RAM 4 times every second. Think about that…

Re:Apple Silicon M1: Black Magic Fuckery by darren_ on Tuesday November 24, 2020 @07:28PM (#25204640)
Yes, reading some more of the discussions it seems like the answer is that (roughly) the same amount of memory is used, but hitting swap is no longer a major problem, at least for user-facing apps. Seems like the original quote is reading too much into the retain/release thing.
Re:Apple Silicon M1: Black Magic Fuckery by jml7c5 on Tuesday November 24, 2020 @07:38PM (#25204704)
If the same amount of memory is used, then wouldn't swap usage be the same?
Re:Apple Silicon M1: Black Magic Fuckery by garretraziel on Wednesday November 25, 2020 @05:59AM (#25207947)
Yeah, but swapping suddenly isn't as big problem as before (probably). You had to be very careful not to hit trashing on x86_64, now you don't have to worry so much.

Or that's how I understand this, I don't actually own M1 Mac.

Re:Apple Silicon M1: Black Magic Fuckery by gameswithgo on Tuesday November 24, 2020 @07:38PM (#25204706)
first there is no sensible reason why ram bandwidth would be different by 3x, its lpddr4x either way, and you can’t replace it from an ssd that fast, the ssd would limit swap speed
Re:Apple Silicon M1: Black Magic Fuckery by nojito on Tuesday November 24, 2020 @08:09PM (#25204890)
What?

https://www.anandtech.com/show/16252/mac-mini-apple-m1-teste...

> Besides the additional cores on the part of the CPUs and GPU, one main performance factor of the M1 that differs from the A14 is the fact that’s it’s running on a 128-bit memory bus rather than the mobile 64-bit bus. Across 8x 16-bit memory channels and at LPDDR4X-4266-class memory, this means the M1 hits a peak of 68.25GB/s memory bandwidth.

The point of the memory bandwidth is so that it never has to swap to disk in the first place.

Re:Apple Silicon M1: Black Magic Fuckery by ericpauley on Tuesday November 24, 2020 @08:50PM (#25205134)
> The point of the memory bandwidth is so that it never has to swap to disk in the first place.

What? How does memory bandwidth obviate the need for disk swapping?

Re:Apple Silicon M1: Black Magic Fuckery by ubercow13 on Tuesday November 24, 2020 @08:46PM (#25205112)
How does memory bandwidth prevent it needing to swap to disk?
Re:Apple Silicon M1: Black Magic Fuckery by Izikiel43 on Tuesday November 24, 2020 @09:31PM (#25205377)
By swap speed I think he meant that the bottle neck is the time that it takes to move data from the SSD to the RAM, not how fast can the RAM be read from the processor.
Re:Apple Silicon M1: Black Magic Fuckery by nottorp on Tuesday November 24, 2020 @07:10PM (#25204535)
Sounds like some form of GDDR instead of plain DDR. Not only faster, but I bet simultaneously accessible from both the CPU and GPU.
Re:Apple Silicon M1: Black Magic Fuckery by MBCook on Tuesday November 24, 2020 @07:29PM (#25204650)
> Not only faster, but I bet simultaneously accessible from both the CPU and GPU.

It is. We know they're using a unified memory architecture, they pointed it out in the presentation.

Re:Apple Silicon M1: Black Magic Fuckery by nottorp on Tuesday November 24, 2020 @07:51PM (#25204786)
Unified doesn't necessarily mean dual ported.
Re:Apple Silicon M1: Black Magic Fuckery by dfox on Tuesday November 24, 2020 @09:52PM (#25205520)
Due to how DRAM works the array itself cannot have more than one port and almost certainly even the DRAM chip as a whole is still some variation of single ported SDRAM (long time ago there were various pseudo-dual-ported DRAM chips, but these were only really useful for framebuffer-like applications). But given that there are multiple levels of cache in the SoC it is somewhat moot point.
Re:Apple Silicon M1: Black Magic Fuckery by sliken on Wednesday November 25, 2020 @12:40AM (#25206302)
LPDDR4x (the ram chips in the m1) comes in dual port flavors.
Re:Apple Silicon M1: Black Magic Fuckery by formerly_proven on Wednesday November 25, 2020 @04:45AM (#25207495)
I suspect you mean they come with two channels on a single chip, which is not the same as two ports. Channels access separate bits of memory. Ports access the same bits of memory.
Re:Apple Silicon M1: Black Magic Fuckery by mehrdada on Wednesday November 25, 2020 @01:50AM (#25206572)
Nope. Nothing too magical, I suspect. It says LPDDR4 right there in System Profiler, although it does not indicate the frequency.
Re:Apple Silicon M1: Black Magic Fuckery by ytch on Tuesday November 24, 2020 @08:15PM (#25204918)
This reminds me that Xbox series X/PS5 use Unified GDDR for higher memory bandwidth, I'm curious if such design can help x86 catch up M1?
Re:Apple Silicon M1: Black Magic Fuckery by kllrnohj on Tuesday November 24, 2020 @08:43PM (#25205098)
x86 has been doing unified memory for integrated GPUs since at least 2015. It's not a new thing, see for example https://bit-tech.net/news/tech/cpus/amd-huma-heterogeneous-u...

The reason GDDR isn't typically used for system RAM is it's higher latency & more power hungry. Like, the GDDR6 memory on a typical discreet card uses more power than the an entire M1-powered Mac Mini power hungry.

Re:Apple Silicon M1: Black Magic Fuckery by ytch on Tuesday November 24, 2020 @08:48PM (#25205121)
Thanks, I haven't noticed the latency/power difference of GDDR memory.
Re:Apple Silicon M1: Black Magic Fuckery by gameswithgo on Tuesday November 24, 2020 @07:39PM (#25204710)
no its normal mobile ram
Re:Apple Silicon M1: Black Magic Fuckery by sliken on Wednesday November 25, 2020 @12:41AM (#25206311)
The M1 has 4 LPDDR4x chips inside the the CPU package running at 4266 Mhz and showing some of the best latencies I've seen.

What "normal" laptop has that?

Re:Apple Silicon M1: Black Magic Fuckery by MobiusHorizons on Wednesday November 25, 2020 @02:26AM (#25206748)
I believe the poster meant "normal" in the sense that it's a conventional memory technology for laptops. (ie LPDDR4 not GDDR like had been suggested above).
Re:Apple Silicon M1: Black Magic Fuckery by gameswithgo on Wednesday November 25, 2020 @07:36AM (#25208545)
being inside the cpu package should allow for less than a 1% improvement in latency by my napkin math. its got good latency because it is a top of the line mobile ram setup but that isn’t unique to m1
Re:Apple Silicon M1: Black Magic Fuckery by sliken on Wednesday November 25, 2020 @11:02AM (#25210610)
I 100% agree, but I've audited my code, and on other platforms my code closely agrees with LMbench's lat_mem_rd, which seems pretty well regarded for accuracy.

The latency appears real to me.

Re:Apple Silicon M1: Black Magic Fuckery by uncomputation on Tuesday November 24, 2020 @07:13PM (#25204559)
Someone please correct me for the sake of all of us if I’m wrong, but it sounds like Apple is using specialized hardware for “NSObject” retain-and-release operations, which may bypass/reduce the impact on general RAM.
Re:Apple Silicon M1: Black Magic Fuckery by xenadu02 on Wednesday November 25, 2020 @04:52AM (#25207536)
On recent Apple Silicon CPUs uncontended most atomic operations are essentially free - almost identical in speed to the non-atomic version of the same operation. Reference counting must be atomic safe whether using ARC or MRR. On x86 systems those atomic operations impose a performance cost. On Apple Silicon they do not. It does not change how much memory is used but it does mean you can stop worrying about the cost of atomic operations. It has nothing to do with the ARMv8 instruction set, it has to do with how the underlying hardware implements those operations and coordinates among cores.

Separately from that x86's TSO-ish memory model also imposes a performance cost whether your algorithm needs those guarantees or not. Code sometimes relies on those guarantees without knowing it. Absent hardware support you would need to insert ARM atomics in translated code to preserve those guarantees which on most ARM CPUs would impose a lot of overhead. The M1 allows Rosetta to put the CPU into a memory ordering mode that preserves the expected memory model very efficiently (as well as using 4K page size for translated processes).

Re:Apple Silicon M1: Black Magic Fuckery by kllrnohj on Wednesday November 25, 2020 @11:13AM (#25210742)
> On recent Apple Silicon CPUs uncontended most atomic operations are essentially free - almost identical in speed to the non-atomic version of the same operation.

They are fast for atomics but still far, far slower than the equivalent non-atomic operation. An add operation takes around half a cycle (upper bound here - with how wide the firestorm core is an add operation is almost certainly less than half a cycle). At 1ghz a cycle is 1 nanosecond. The M1 runs at around 3ghz. So you're still talking the atomic operation being >10x slower than non-atomics.

Which should not be surprising at all. Apple didn't somehow invent literal magic here. They still need coherency across 8 cores, which means at a minimum L1 is bypassed for the atomic operation. The L2 latency is very impressive, contributing substantially to that atomic operation performance. But it's still coming at a very significant cost. It's very, very far from free. There's also no ARM vs. x86 difference here, since the atomic necessarily forces a specific memory ordering guarantee that's stricter than x86's default. Both ISAs are forced to do the same thing and pay the same costs.

Re:Apple Silicon M1: Black Magic Fuckery by saagarjha on Wednesday November 25, 2020 @09:41PM (#25216380)
> So you're still talking the atomic operation being >10x slower than non-atomics.

How did you arrive at this number?

Re:Apple Silicon M1: Black Magic Fuckery by kllrnohj on Thursday November 26, 2020 @12:50PM (#25222108)
> How did you arrive at this number?

It's in the post. Half a cycle for an add or less, and cycles are every 1/3 nanosecond. So upper bound for an add would be around 1/6th a nanosecond. Likely less than that still yet, since the M1 is probably closer to an add in 1/8th a cycle not 1/2. Skylake by comparison is at around 1/4th a cycle for an add, and since M1's IPC is higher it's not going to be worse at basic ALU ops.

6 nanoseconds @ 3ghz is 18 cycles. That's on the slow end of the spectrum for a CPU instruction.

Re:Apple Silicon M1: Black Magic Fuckery by saagarjha on Friday November 27, 2020 @01:57AM (#25226152)
Where? 6 nanoseconds is pretty long, that’s about how long it’d take to do an entire retain/release pair, which is a couple dozen instructions I believe.
Re:Apple Silicon M1: Black Magic Fuckery by torstenvl on Tuesday November 24, 2020 @07:46PM (#25204754)
I don't think that's quite right. Apple believes strongly in retain-and-release / ARC. It has designed its software that way; it has designed its M1 memory architecture that way. The harmony between those design considerations leads to efficiency: the software does things in the best way possible, given the memory architecture.

I'm not an EE expert and I haven't torn apart an M1, but Occams's Razor would suggest it's unlikely they made specialized hardware for NSObjects specifically. Other ARC systems on the same hardware would likely see similar benefits.

Re:Apple Silicon M1: Black Magic Fuckery by dfox on Tuesday November 24, 2020 @09:34PM (#25205394)
I suspect that Apple didn't anything special to improve performance of reference counting apart from not using x86. Simply put x86 ISA and memory model is built on assumption that atomic operations are mostly used as part of some kind of higher-level synchronization primitive and not for their direct result.
Re:Apple Silicon M1: Black Magic Fuckery by lilyball on Wednesday November 25, 2020 @01:10AM (#25206416)
M1 is faster at retain/release under Rosetta2 than x86, and yet Rosetta2 still has the same strong memory model that x86 does.
Re:Apple Silicon M1: Black Magic Fuckery by dfox on Wednesday November 25, 2020 @06:10AM (#25208019)
One thing is that M1 has incredible memory BW and is implemented on single piece of silicon (which certainly helps with low-overhead cache consistency). Another thing is that rosetta certainly does not have to preserve exact behavior of x86 (and in fact it cannot because doing so will negate any benefits of dynamic translation) it only has to care about what can be observed by the user code running under it.
Re:Apple Silicon M1: Black Magic Fuckery by saagarjha on Tuesday November 24, 2020 @09:24PM (#25205334)
The hardware makes uncontended atomics very fast, and Objective-C is a heavy user of those. But it would really help any application that could use them, too.
Re:Apple Silicon M1: Black Magic Fuckery by thu2111 on Wednesday November 25, 2020 @11:34AM (#25211016)
But GCd languages don't need to hit atomic ops constantly in the way ref-counted Objective C does, so making them faster (though still not as fast as regular non-atomic ops) is only reducing the perf bleeding from the decision to use RC in the first place. Indeed GC is generally your best choice for anything where performance matters a lot and RAM isn't super tight, like on servers.

Kotlin/Native lets us do this comparison somewhat directly. The current and initial versions used reference counting for memory management. K/N binaries were far, far slower than the equivalent Kotlin programs running on the JVM and the developer had to deal with the hassle of RC (e.g. manually breaking cycles). They're now switching to GC.

The notion that GC is less memory efficient than RC is also a canard. In both schemes your objects have a mark word of overhead. What does happen though, is GC lets you delay the work to deallocate from memory until you really need it. A lot of people find this quite confusing. They run an app on a machine with plenty of free RAM, and observe that it uses way more memory than it "should" be using. So they assume the language or runtime is really inefficient, when in reality what's happened is that the runtime either didn't collect at all, or it collected but didn't bother giving the RAM back to the OS on the assumption it's going to need it again soon and hey, the OS doesn't seem to be under memory pressure.

These days on the JVM you can fix that by using the latest versions. The runtime will collect and release when the app is idle.

Re:Apple Silicon M1: Black Magic Fuckery by nemothekid on Tuesday November 24, 2020 @07:39PM (#25204712)
I saw that point brought up on Twitter and I don't know how it it makes more efficient use of RAM.

Specifically, as I understood it is that Apple software (written in objective C/Swift) uses a lot of retain/release (or Atomic Reference Counting) on top of manual memory, for memory management rather than other forms of garbage collection (such as those found in Java/C#), which gives Objective C programs a lower memory overhead (supposedly). This is why the iPhone ecosystem is able to run so much more snappier than the Android ecosystem.

That said, I don't see how that translates to lower memory usage than x86 programs. I think the supporting quotes he used for that point are completely orthogonal. I don't have an M1 mac, but I believe the same program running on both machines should use the same amount of memory.

Re:Apple Silicon M1: Black Magic Fuckery by sgerenser on Wednesday November 25, 2020 @12:24AM (#25206247)
The only thing I can think of that would actually reduce memory usage on M1 vs the same version of MacOS on x86 would be if they were able to tune their compressed memory feature to run faster (with higher compression ratio) on the M1. That would serve to reduce effective memory usage or need to fall back to swap. I would not expect something like that to be responsible for more than, say, a 5-10% RAM usage decrease though.
Re:Apple Silicon M1: Black Magic Fuckery by danieldk on Wednesday November 25, 2020 @01:54AM (#25206590)
That would serve to reduce effective memory usage or need to fall back to swap. I would not expect something like that to be responsible for more than, say, a 5-10% RAM usage decrease though.

I think you can reach a lot more than that. Presumably, on Intel they use something like LZO or LZ4, since it compresses/decompresses without too much CPU overhead. But if you have dedicated hardware for something like e.g. Brotli or zstd, one could reach much higher compression ratios.

Of course, this is assuming that memory can be compressed well, but I think this is true in many cases. E.g. when selecting one of the program/library files in the squash benchmarks:

https://quixdb.github.io/squash-benchmark/

you can observe higher compression ratios for e.g. Brotli/gzip/deflate than LZO/LZ4.

Re:Apple Silicon M1: Black Magic Fuckery by sgerenser on Wednesday November 25, 2020 @07:35AM (#25208542)
I suspect Apple is using their own LZFSE[0] compression, perhaps now with special tweaks for M1. The reason I only suspected a 5-10% increase though is even if it’s able to achieve a massive increase in compression ratio (compressing 3GB to 1GB instead of 2GB, say), that’s still only saving 1GB total. Which I guess isn’t nothing and is more than 10% on an 8GB machine.

[0] https://en.m.wikipedia.org/wiki/LZFSE

Re:Apple Silicon M1: Black Magic Fuckery by lern_too_spel on Tuesday November 24, 2020 @10:06PM (#25205588)
For a very long time, budget Android devices that were one or even two generations older were faster than just released iPhones at launching new apps to interactivity (see: hundreds of Youtube "speed comparison" videos). This was purely due to better software, as the iPhone had significantly faster processors and I/O. RAM doesn't play a big factor at launch. One very minor contributor would be that the GC doesn't need to kick in until later, while ARC is adding its overhead all the time.

Edit: apparently, this isn't common knowledge.

https://www.youtube.com/watch?v=emPiTZHdP88

https://youtu.be/hPhkPXVxISY

https://youtu.be/B5ZT9z9Bt4M

Re:Apple Silicon M1: Black Magic Fuckery by thu2111 on Wednesday November 25, 2020 @11:39AM (#25211085)
Ridiculous that you're downvoted. There are a lot of people posting here who haven't worked on memory management subsystems.

GC vs RC is not a trivial comparison to make, but overall there are good reasons new systems hardly use RC (Objective-C dating back to the 90s isn't new). Where RC can help is where you have a massive performance cliff on page access, i.e. if you're swapped to disk. Then GC is terrible because it'll try and page huge sections of the heap at once where as RC is way more minimal in what it touches.

But in most other scenarios GC will win a straight up fight with an RC based system, especially when multi-threading gets involved. RC programs just spend huge amounts of time atomically incrementing and decrementing things, and rummaging through the heap structures, whereas the GC app is flying along in the L1 cache and allocations are just incrementing a pointer in a register. The work of cleaning up is meanwhile punted to those spare cores you probably aren't using anyway (on desktop/mobile). It's tough to beat that by hand with RC, again, unless you start hitting swap.

If M1 is faster at memory ops than x86 it's because they massively increased memory bandwidth. In fact I'd go as far as saying the CPU design is probably not responsible for most of the performance increase users are seeing. Memory bandwidth is the bottleneck for a lot of desktop tasks. If M1 core is say 10% faster than x86 but you have more of them and memory bandwidth is really 3x-4x larger, and the core can keep far more memory ops in flight simultaneously, that'll explain the difference all by itself.

Re:Apple Silicon M1: Black Magic Fuckery by lern_too_spel on Wednesday November 25, 2020 @01:12PM (#25212278)
Indeed, one of the articles cited by the article that this discussion is about (https://blog.metaobject.com/2020/11/m1-memory-and-performanc...) links to a paper saying that GC needs 4x the memory to match manual memory management and then makes a huge wacky leap to say that ARC could achieve that with less. It can't. ARC will always be slower than manual memory management because it behaves the same way as naive manual memory management with some overhead on top.

On the other hand, that same paper shows that for every single one of their tested workloads, the generational GC outperforms manual memory management. Now obviously, you could do better with manual memory management if you took the time to understand the memory usage of your application to reduce fragmentation and to free entire arenas at a time, but for applications that don't have the developer resources to apply to that (the vast majority), the GC will win.

I'm not saying that better memory management is the reason Android wins these launch to interactivity benchmarks because the difference is so stark relative to the hardware performance that memory management isn't nearly enough to explain it, but it does contribute to it. (My own guess is that most of the performance difference comes from smarter process initialization from usage data. Apple is notoriously bad at using data for optimization.)

Re:Apple Silicon M1: Black Magic Fuckery by donarb on Wednesday November 25, 2020 @12:03PM (#25211407)
ARC stands for Automatic Reference Counting.

https://en.wikipedia.org/wiki/Automatic_Reference_Counting

Re:Apple Silicon M1: Black Magic Fuckery by ianai on Tuesday November 24, 2020 @09:07PM (#25205223)
Tfa says the hardware optimization for ARC is to the point of being bespoken. Hardware will always beat software optimization. Further, the other GCs have much higher ram overheads than this combined, bespoke system.

Apple has decades of proven experience producing and shipping massively over engineered systems. I believe em when they say these processors do ARC natively.

Re:Apple Silicon M1: Black Magic Fuckery by nemothekid on Tuesday November 24, 2020 @10:08PM (#25205607)
I’m not denying that Apple has better ARC performance. It’s that I don’t understand how an application would use less memory on ARM than x86. I’d expect the ARM code to run faster (as a result of being able to do atomic operations faster), but I don’t see how that translates to less memory usage
Re:Apple Silicon M1: Black Magic Fuckery by AnonC on Tuesday November 24, 2020 @11:52PM (#25206150)
In one of those random “benchmark tests” online where someone opened several applications on an M1 Mac with 8GB RAM and did some work on those, they kept Activity Monitor open alongside and pointed to the increase in swap at some stage. So it seems like the swap is fast enough and is used more aggressively. That reduces the amount of RAM used at any point in time. The data in RAM has also benefited from compression in macOS for several years now.
Re:Apple Silicon M1: Black Magic Fuckery by ianai on Tuesday November 24, 2020 @10:20PM (#25205688)
Read up on the performance overhead of GC across other languages. They’re messy and can lock up periodically. They take up significant ram and resources.
Re:Apple Silicon M1: Black Magic Fuckery by wmf on Tuesday November 24, 2020 @10:34PM (#25205780)
We're talking about non-GC apps on x86 vs. the same non-GC apps on Arm.
Re:Apple Silicon M1: Black Magic Fuckery by ianai on Wednesday November 25, 2020 @05:55AM (#25207921)
Even those still do memory management-and usually poorly.
Re:Apple Silicon M1: Black Magic Fuckery by gameswithgo on Tuesday November 24, 2020 @07:36PM (#25204689)
it makes objective c and swift memory management faster but it doesn’t reduce ram usage at all. (maybe a weee bit less bandwidth used)
Re:Apple Silicon M1: Black Magic Fuckery by rimliu on Wednesday November 25, 2020 @02:50AM (#25206861)
If memory is released as soon as possible instead of waiting for the next GC cycle, does not it make it more efficient?
Re:Apple Silicon M1: Black Magic Fuckery by tokamak-teapot on Wednesday November 25, 2020 @04:41AM (#25207468)
Yes!

Hopefully I can clear up the discussion a little:

Q: Does reference counting 'use' less RAM than GC?

A: Yes (caveats etc. go here, but your question is a good explanation)

Q: Does the M1 in and of itself require less RAM than x86 processors?

A: No

Q: So why are people talking about the M1 and its RAM usage as if it's better than with x86?

A: It's really just around the faster reference counting. MacOS was already pretty efficient with RAM.

I'd like to propose tokamak-teapot's formula for hardware purchase:

Minimum RAM believed to be required = actual amount of RAM required * 2

N.B. I am aware that a sum that's greater than 16GB doesn't magically become less than 16GB, but it is somewhat surprising how well MacOS performs when it feels like RAM should be tight, so I'd suggest borrowing a Mac or making a Hackintosh to experience this if you're anxious about hitting the ceiling.

Re:Apple Silicon M1: Black Magic Fuckery by masklinn on Wednesday November 25, 2020 @03:17AM (#25207007)
There is no “next GC cycle”, objc and swift use ref counting on every platform (there was an abortive GC attempt on desktops a few years back but it never saw wide use and has been deprecated since mountain lion).
Re:Apple Silicon M1: Black Magic Fuckery by gameswithgo on Wednesday November 25, 2020 @07:33AM (#25208529)
these are not gc apps, they are reference counted.
Re:Apple Silicon M1: Black Magic Fuckery by wmf on Tuesday November 24, 2020 @07:53PM (#25204808)
It's ARMv8.x atomic instructions.
Re:Apple Silicon M1: Black Magic Fuckery by jolux on Tuesday November 24, 2020 @07:40PM (#25204724)
Their hardware is almost certainly specialized for reference counting, but I would be surprised if they had a custom instruction or anything.
Re:Apple Silicon M1: Black Magic Fuckery by torginus on Wednesday November 25, 2020 @03:03AM (#25206930)
The post kind of does: > The benefit of sticking to RC is much-reduced memory consumption. It turns out that for a tracing GC to achieve performance comparable with manual allocation, it needs several times the memory (different studies find different overheads, but at least 4x is a conservative lower bound). It implies that ref-counting is more economical in terms of wasted memory than GC, with the tradeoff being performance. This is solved thanks to the M1.
Re:Apple Silicon M1: Black Magic Fuckery by masklinn on Wednesday November 25, 2020 @03:14AM (#25206992)
Apple’s runtimes have always used rc, this is not a change between Intel and arm.
Re:Apple Silicon M1: Black Magic Fuckery by pjmlp on Wednesday November 25, 2020 @04:01AM (#25207253)
Nope, they also tried a tracing GC for Objective-C on the desktop, but it was a failure due to interoperability across libraries compiled in different modes alongside C semantics.

Then they pivoted into automating retain/release patterns from Cocoa and sold it, Apple style, as a victory of RC over tracing GC, while moving the GC related docs and C related workarounds into the documentation archive.

Re:Apple Silicon M1: Black Magic Fuckery by masklinn on Wednesday November 25, 2020 @06:04AM (#25207980)
> Nope, they also tried a tracing GC for Objective-C on the desktop

Operative word: tried. GC was an optional desktop-only component deprecated in Mountain Lion, which IIRC has not been accepted on MAS since 2015 was removed entirely from Sierra.

Without going into irrelevant weeds, "apple has always used refcounting everywhere" is a much closer approximation.

Re:Apple Silicon M1: Black Magic Fuckery by pjmlp on Wednesday November 25, 2020 @06:17AM (#25208066)
Operative word: failed.

Which then in Apple style ("you are holding it wrong") turned it around in a huge marketing message, while hiding away the tracing GC efforts.

Re:Apple Silicon M1: Black Magic Fuckery by masklinn on Wednesday November 25, 2020 @07:12AM (#25208382)
> Operative word: failed.

That's not exactly relevant to the subject at hand of what memory-management method software usually uses on macos.

> Which then in Apple style ("you are holding it wrong") turned it around in a huge marketing message, while hiding away the tracing GC efforts.

Hardly?

And people are looking to refcounting as a reason why apple software is relatively light on memory, which is completely fair and true and e.g. generally assumed as one of the reasons why ios devices fare well with significantly less ram than equivalent android devices. GCs have significant advantages, but memory overhead is absolutely one of the drawbacks.

Re:Apple Silicon M1: Black Magic Fuckery by pjmlp on Wednesday November 25, 2020 @08:07AM (#25208785)
Nope, as proven by performance tests,

https://github.com/ixy-languages/ixy-languages

And the fact that M1 has special instructions dedicated to optimize RC,

https://blog.metaobject.com/2020/11/m1-memory-and-performanc...

Memory overhead in languages with tracing GC (RC is a GC algorithm) only happens in languages like Java without support for value types.

If the language supports value types, e.g. D, and there is still memory overhead versus RC, then fire the developers or they better learn to use the language features available on their plate.

Re:Apple Silicon M1: Black Magic Fuckery by yakubin on Wednesday November 25, 2020 @10:02AM (#25209924)
> Nope, as proven by performance tests,

> https://github.com/ixy-languages/ixy-languages

This shows latency, not memory consumption, as far as I can tell.

> If the language supports value types, e.g. D, and there is still memory overhead versus RC, then fire the developers or they better learn to use the language features available on their plate.

Memory overhead of certain types of garbage collectors (notably generational ones) is well-known and it's specified relative to the size of the heap that they manage. Using value types is of course a valid point, regarding how you should use the language, but it doesn't change the overhead of the GC, it just keeps the heap it manages smaller. If the overhead was counted against the total memory use of a program, then we wouldn't be talking about the overhead of the garbage collector, but more about how much the garbage collector is actually used. Note that I'm not arguing against tracing GCs, only trying to keep it factual.