From the GitHub page:

> It is a Gameboy Advance from a parallel universe where RISC-V existed in 2001. A love letter to the handheld consoles from my childhood, and a 3AM drunk text to the technology that powered them.

Thank you to the author for writing a GitHub page in 2026 that is entirely devoid of emoji.

I mean no disrespect to Luke Wren, but he did not write it in 2026; he wrote it in 2018-2021. :)

It's still on the backburner. I'm gonna finish it... one day...

on the other hand having emoji on the readme is a great signal of llm-slop on my radar

Isn't that the same hand?

On the other hand, it does appear to be the same hand.

very interesting point of view, thanks for letting us know and wasting everyone time

Does RISCBoy run Godot Engine? How can I make RISCBoy run Godot Engine?

No. You can't.

I'm quite willing to bet it can be done in this era of enabling developers with slob, which still usually works.

How can you fit Godot into 512KB of RAM? And with no GPU?

If you set up the RISCBoy toolchain and port it then yeah.

This is a much smaller device then anyone has ever exported Godot to.

More practical would be to port https://github.com/gbdk-2020/gbdk-2020 so that https://github.com/chrismaltby/gb-studio could support it.

Why do you want an engine? Just write games

Your comment got downvoted but I think there's deep truth in it. I've been decompiling GBA games from my childhood and it's remarkable how engineless they seem to be.

Yeah, the purpose of these kinds of designs is to not have to deal with 3rd party engines. The machine is the engine.

I was curious because I spent my time making engines and not making games.

Its not a computer, its a small device. You dont have many unknown peripheral you dont have other programs. The memory and peripherals are there, just use them. Heap is complicated ? Preallocate everything. A peripheral is not used ? Just leave it there. Security ? Of what ? Thats the appeal of those devices.

i love the "hardware from an alternate universe" projects.

All hardware exists in an alternative universe until it is manifest in ours.

the projects part is the manifesting

Oh this is Luke Wren’s work. He’s an ASIC design engineer at Raspberry Pi. Amazing project, I love it!

I think "ASIC design" engineer is under-selling him--he's working on their CPU cores too!

Haha yeah I just went by his LinkedIn title

This guy also designed DVI/HDMI from RP2040:

https://github.com/Wren6991/PicoDVI

He works at Raspberry Pi, and designed the Hazard3 RISC-V core that is at the heart of the RP2350--although he did Hazard3 in his spare time. It's actually a fork of the "Hazard5" core that he designed for the RISCBoy.

I'm surprised to see that it's OK that he has opensource AHB/APB stuff in it--I'd avoided learning them too much about them assuming that they were ARM proprietary.

AMBA has been an open standard for a really long time, I think maybe since it was released?

The design was taped out on the first wafer.space run (see https://github.com/wafer-space/ws-run1) but I have not heard if it actually worked or not.

The programmable scanline-buffer-based rendering pipeline described in the PDF is worth a read for fans of such things.

Is the greatest challenge in adopting this new hardware architecture the technology itself, or the lack of an existing developer ecosystem and software toolchains?

Both. In general, hardware development is harder & more costly than software development (although it does depend on what you're doing & how).

Lack of software tools can be overcome. But lack of eg. a game library is a bigger problem. Unless it's really easy to port titles somehow.

The GBA was designed around having no cache. With a few exceptions (such as Internal RAM, Video RAM, IO registers, BIOS, OAM, Palettes), everything goes out to an external bus. Going out to an external bus with no cache will basically slow you down to 80s computer speeds. Fetching instructions from the cartridge ends up being around twice as fast as a GBC.

The way around that is using a cache, and sequentially fetching multiple words. Sequential fetches can be made faster, increasing throughput, and that can hide the latency if enough instructions/data gets cached.

I wonder how this system is designed, is it going to the memory bus for all fetches, or does it use a cache?

The author of this is one of the greatest minds of our time. While doing this is cool, he also designed the Hazard3 core in the RP2350 as well as the QSPI unit in it -- the only memory-mapped QSPI unit I've encountered so far that I've not been able to crash or hang.

I echo your QSPI sentiments .. and the RP2350 is simply badass. So many, many applications. The sonic screwdriver of bus pirates ..