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Re:AMD: Microcode Signature Verification Vulnerability by wrs on Monday February 03, 2025 @02:05PM (#42921591)
"A test payload for Milan and Genoa CPUs that makes the RDRAND instruction return 4"... Turns out kernel RNG belt-and-suspenders was justified?
Re:AMD: Microcode Signature Verification Vulnerability by rincebrain on Monday February 03, 2025 @02:50PM (#42922079)
"in theory" Linux, at least, was supposed to use rdrand's output as _one_ source of entropy, not _the only_ source.

No idea what Windows et al do for this, or if that's still true, but I believe the above description was how the argument was originally ended.

Also, tbh, if you can patch arbitrary instruction behavior, just replacing rdrand seems like far too ham fisted a tool with the level of versatility in your hands...

Re:AMD: Microcode Signature Verification Vulnerability by Tuna-Fish on Monday February 03, 2025 @03:10PM (#42922314)
Linux's rdrand use is proof against it returning bad output, but is not proof against malicious microcode. Reason for this is that the malicious microcode can examine register contents and alter the value it's returning so that mixing it into the previous source of randomness produces the desired evil value.
Re:AMD: Microcode Signature Verification Vulnerability by rincebrain on Monday February 03, 2025 @03:15PM (#42922398)
Sure, but as stated, if you don't trust the CPU at all, rdrand becomes the least of your concerns.
Re:AMD: Microcode Signature Verification Vulnerability by Tuna-Fish on Monday February 03, 2025 @04:18PM (#42923294)
The thing is, all the other ways you can compromise the kernel from microcode are at least theoretically detectable. A security researcher could study how the cpu operates and find the exploit. If RDRAND is surreptitiously replacing all your random numbers with AES of the current time, you cannot find that out from observing behavior.

I agree that worrying about RDRAND shouldn't probably be on the top of anyone's priorities, but there is some cause to at least use it defensively, for example using it to pre-fill buffers with random values in a different context, so that subversion would in the very least require memory references, instead of running RDRAND in the context of your RNG.

Re:AMD: Microcode Signature Verification Vulnerability by Muromec on Monday February 03, 2025 @06:13PM (#42924723)
> If RDRAND is surreptitiously replacing all your random numbers with AES of the current time, you cannot find that out from observing behavior.

Should you not see it from timing alone being wrong?

Re:AMD: Microcode Signature Verification Vulnerability by usrusr on Monday February 03, 2025 @07:11PM (#42925324)
Had the same thought. But then on the other hand, when nobody is looking at the timing, nobody will see anything. And those who do see a timing artifact, will they really dig deeper or will they just shrug off another oddity? I would not like to bet on another Clifford Stoll in this day and age.
Re:AMD: Microcode Signature Verification Vulnerability by Tuna-Fish on Tuesday February 04, 2025 @10:45AM (#42933872)
RDRAND is very slow and you can fix up the timing with a slowdown loop in the microcode.
Re:AMD: Microcode Signature Verification Vulnerability by wtallis on Monday February 03, 2025 @10:57PM (#42927707)
I think you may be overestimating the scale of attack that can be accomplished within the constraints of a microcode update. Given that the CPU has to still seem to be operating normally while using malicious microcode, how much space out of the few kilobytes of a microcode update file is really available for implementing a subtle attack, complete with monitoring the state of the larger system to detect a trigger condition or locate specific information (such as the timestamp you mention)? Sure, malicious microcode theoretically has access to basically everything, but the severely limited payload makes it a lot harder to pull off complicated attacks.
Re:AMD: Microcode Signature Verification Vulnerability by jstasiak on Monday February 03, 2025 @06:57PM (#42925180)
An article mentioning this kind of attack: https://blog.cr.yp.to/20140205-entropy.html
Re:AMD: Microcode Signature Verification Vulnerability by wahern on Monday February 03, 2025 @03:12PM (#42922335)
For organizations like the NSA, a simple hack like this is the opposite of ham-fisted, though presumably they'd try to ensure the output would pass common statistical tests. The utility in quietly breaking cryptographic protocols is presumably a major reason why it was chosen for the proof-of-concept.
Re:AMD: Microcode Signature Verification Vulnerability by rincebrain on Monday February 03, 2025 @03:16PM (#42922414)
Sure, but that was my point, was that just overriding rdrand would be much more ham-fisted than any practical attack I would expect someone to weaponize this into outside of a PoC.
Re:AMD: Microcode Signature Verification Vulnerability by dooglius on Monday February 03, 2025 @03:12PM (#42922349)
Intel's theory I believe was that it could become the only source. The argument in favor I think is the same one you are making now: anything that could hack the chip deeply enough to break rdrand is powerful enough to achieve the same goals in another way.
Re:AMD: Microcode Signature Verification Vulnerability by rincebrain on Monday February 03, 2025 @03:22PM (#42922493)
I'm sure Intel loved that idea, given that I don't think RDRAND showed up on AMD chips for 3 years after Intel launched support for it, and that would let them look much better on a number of benchmarks for that duration...
Re:AMD: Microcode Signature Verification Vulnerability by formerly_proven on Monday February 03, 2025 @05:15PM (#42924031)
I think you misunderstand where in the pipeline RDRAND would sit. It's not a high-performance RNG, that instruction takes hundreds of cycles and generates a couple bytes of data. It's used to derive keys for the actual CSPRNG providing e.g. /dev/urandom (which is basically a stream cipher). Having or not having RDRAND would have no performance impact on the CSPRNG.
Re:AMD: Microcode Signature Verification Vulnerability by rincebrain on Sunday February 09, 2025 @03:38PM (#42993701)
Sure, but as I recall, in those days, the system would happily block for a bit if you managed to drain the estimated entropy pool low enough by doing something like generating an openssh key on first boot, so having another source that the competition takes 3 years to implement could have provided noticable performance benefits for things people notice, like how slow first boot is, in the days before zx2c4 looked at Linux's /dev/random code and hit it with hammers.

(I'm not insisting on that workflow or example being an uptick, just that that's a concrete example of how having an additional source back then could have caused noticable performance differences. I'm aware you're not calling rdrand for your /dev/urandom or random accesses, now or then.)

Re:AMD: Microcode Signature Verification Vulnerability by dist-epoch on Monday February 03, 2025 @04:06PM (#42923127)
Windows collects hardware device entropy and mixes it into the pool.

It also persists the pool across reboots so it doesn't start empty.

Re:AMD: Microcode Signature Verification Vulnerability by c2xlZXB5Cg1 on Monday February 03, 2025 @03:01PM (#42922197)
Re:AMD: Microcode Signature Verification Vulnerability by saagarjha on Monday February 03, 2025 @03:16PM (#42922411)
I assume the Google engineers have a sense of humor
Re:AMD: Microcode Signature Verification Vulnerability by eptcyka on Monday February 03, 2025 @04:50PM (#42923716)
That's a reference to the PS3's RNG.
Re:AMD: Microcode Signature Verification Vulnerability by Karliss on Monday February 03, 2025 @05:49PM (#42924449)
I always thought the same when seeing that XKCD comic, but turns out it was the opposite. PS3 hack (2010) came 3 years after the XKCD comic(2007), they even used it as one of slides during 27C3 presentation. https://media.ccc.de/v/27c3-4087-en-console_hacking_2010#t=2...
Re:AMD: Microcode Signature Verification Vulnerability by eptcyka on Tuesday February 04, 2025 @12:33AM (#42928441)
Oh my.
Re:AMD: Microcode Signature Verification Vulnerability by nicman23 on Tuesday February 04, 2025 @01:47AM (#42928925)
oh fuck i had forget that blast of a presentation
Re:AMD: Microcode Signature Verification Vulnerability by Lammy on Monday February 03, 2025 @04:58PM (#42923831)
I realize the OP is explicitly (w/r/t 4) a reference to XKCD, but See Also: Dilbert 2001-10-25 :)

https://web.archive.org/web/20011027002011/http://www.dilber...

https://dilbert-viewer.herokuapp.com/2001-10-25

Re:AMD: Microcode Signature Verification Vulnerability by bestouff on Monday February 03, 2025 @02:32PM (#42921861)
Yes ! I wonder what's the Windows implementation of the equivalent API.
Re:AMD: Microcode Signature Verification Vulnerability by cluckindan on Monday February 03, 2025 @03:07PM (#42922278)
Run the patch and find out.
Re:AMD: Microcode Signature Verification Vulnerability by loeg on Monday February 03, 2025 @06:53PM (#42925132)
> Windows 10 has many entropy sources; these work together to ensure that the OS has good entropy. Different entropy sources guarantee good entropy in different situations; by using them all the best coverage is attained.

> Interrupt Timings

> The primary entropy source in Windows 10 is the interrupt timings. On each interrupt to a CPU the interrupt hander gets the Time Stamp Count (TSC) from the CPU. This is typically a counter that runs on the CPU clock frequency; on X86 and X64 CPUs this is done using the RDTSC instruction.

> ...

> The Intel RDRAND instruction is an on-demand high quality source of random data.

> If the RDRAND instruction is present, Winload gathers 256 bits of entropy from the RDRAND instruction. Similarly, our kernel-mode code creates a high-pull source that provides 512 bits of entropy from the RDRAND instruction for each reseed. (As a high source, the first 256 bits are always put in pool 0; providing 512 bits ensures that the other pools also get entropy from this source.)

> Due to some unfortunate design decisions in the internal RDRAND logic, the RDRAND instruction only provides random numbers with a 128-bit security level. The Win10 code tries to work around this limitation by gathering a large amount of output from RDRAND which should trigger a reseed of the RDRAND-internal PRNG to get more entropy. Whilst this solves the problem in most cases, it is possible for another thread to gather similar outputs form RDRAND which means that a 256-bit security level cannot be guaranteed.

> Based on our feedback about this problem, Intel implemented the RDSEED instruction that gives direct access to the internal entropy source. When the RDSEED instruction is present, it is used in preference to RDRAND instruction which avoids the problem and provides the full desired guarantees. For each reseed, we gather 128 output bytes from RDSEED, hash them with SHA-512 to produce 64 output bytes. As explained before, 32 of these go into pool 0 and the others into the ‘next’ pool for this entropy source.

https://aka.ms/win10rng

Re:AMD: Microcode Signature Verification Vulnerability by monocasa on Monday February 03, 2025 @04:23PM (#42923382)
I wouldn't focus so much on the rdrand part. That's more a proof that they have crafted a custom microcode than trying to say that rdrand is broken.
Re:AMD: Microcode Signature Verification Vulnerability by wrs on Monday February 03, 2025 @06:02PM (#42924609)
I think the argument for entropy mixing was that RDRAND could be broken, not that it was broken. On these processors, apparently yes it could.
Re:AMD: Microcode Signature Verification Vulnerability by monocasa on Monday February 03, 2025 @07:42PM (#42925707)
Re:AMD: Microcode Signature Verification Vulnerability by Aardwolf on Tuesday February 04, 2025 @10:23AM (#42933470)
Can a CPU implement RDRAND however it wants, or are there specifications that constrain it in some way?

E.g. if a CPU were to put a microscopic lavalamp and camera inside it and use a hash code of pictures taken from this lavalamp as the result of RDRAND: would that be compliant?

I know microscopic lavalamp in CPU is not physically feasible, what I'm asking is if RDRAND is broken by design, or proper physics based RNG's could be used to implement if a CPU maker wanted to