The ultimate goal is indeed to build an ultra-fast ASIC. There's a $1M ASIC circuit competition planned for for 2020. This $100K FPGA competition is a "warm up" to the ASIC competition.

A bit more information here https://www.youtube.com/watch?v=9-77V1IareQ&feature=youtu.be...

From the linked article:

> The primary infrastructure for the contest will be Amazon EC2 F1 instances

So no, you need to design it on the F1 FPGA instance.

It's a matter of programming an FPGA to be faster than anyone else's FPGA when handed the task from software. So technically, yes, it's simply a matter of designing hardware. The part that's not so simple is designing hardware given the same FPGA as every other competitor and making it faster than all of them while returning only correct answers.

It sounds like that part is already done; now they're optimizing the hardware design.