I'm surprised we haven't seen more investment from Indian firms. India is really trying to raise their game in the tech economy beyond the services industry. You don't need the most cutting-edge chip fabrication equipment to manufacture these processors.

Services industry is gonna be tough in the age of AI agents.

If by really trying you mean a bunch of PR stunts and diverted funds, sure.

Are you aware of any actual credible attempts?

The Indian government was actually a very early adopter, they had one of the first RISC-V processors that wasn't based on the vanilla Rocket designs, starting back in like 2016 or so. Unfortunately they made some other weird decisions, like not supporting compressed instructions so the chip wasn't compatible with any mainstream Linux distros, and I don't think the project really went anywhere. Although looking at Wikipedia the project seems to still exist.

https://en.wikipedia.org/wiki/SHAKTI_(microprocessor)

China also has LoongArch.

LoongArch is a weird mix of MIPS and RISC-V. There's not much that would be gained by investing a whole bunch into LoongArch that couldn't also be done to RISC-V, if at all.

LoongArch has the advantage that they don't need to rely on a committee, they can just do things as they see fit.

The 2023 3A6000 already reached the performance of this RISC-V board

Thing about RISC-V is that there are technically no barriers on doing as you see fit, but there's very clearly defined lines where community support isn't guaranteed, like custom extensions or screwing with already ratified extensions.

We actually don't know a lot about the UR-DP1000 chip, while we do know quite a bit about the 3A6000 because of Chips and Cheese. This makes a thorough analysis of the crimes committed within the core architecture of the UR chip more of speculation than a coherent discussion.

But we do know:

1. The UR-DP1000 does not have any Vector instructions 2. UR only has a 4 way OOO design, while the 3A6k is 6 way OOO 3. The cache architecture of the UR is more complicated, with 4 cores sharing 4MB L3 per cluster (2 clusters total), and a 16MB global L4 where the 3A6k doesn't have this 4. The UR chip doesn't have SMT

It's not better architecture so the gain is few pennies more per chip at cost of A LOT of work... work that can't just run Android or much else out of the box.

Isn’t that kind of like saying automated testing (for apps written without testing in mind) isn’t worth it because you have to spend time getting code into a state that is testable?

I do agree that it takes a lot of work to get something usable, and so I think we are a ways off from mainstream risc-v. I do also think there is a lot more value for low power devices like embedded/IoT or instances where you need special hardware. Facebook uses it to make special video transcoding hardware.

Getting the chip stable is one thing. Getting all the various software applications that one uses test their chip is another, and a lot of hardware companies won’t have experience there. Then there is customer code…

> I would think they want to decouple from ARM and the west in general as a dependency.

Why would you think that? ARM is not like x86 CPUs where you get the completed devices as a black box. Chinese silicon customers have access to the full design. I guess it's not completely impossible to hide backdoors at that level but it'd be extremely hard and would be a huge reputational risk if they were found.

They also can't really be locked out of ARM since if push comes to shove, Chinese silicon makers would just keep making chips without a license.

I did catch one vendor using a HAL across a whole SoC product line, a very low-level HAL that sat between SoC hardware registers and kernel drivers. It effectively made the drivers use scrambled register locations on the AHB etc, but if you resolved what the HAL did, the registers matched ARM's UART etc IP. So I figured they were ducking license fees for ARM peripherals.

arm has toxic IP locks.

Everybody sane will want to move away from them, there is nothing chinese specific.

The most performant RISC-V implementations are from the US if I am not too mistaken.

Wonder if that hardware can handle an AMD 9070 XT (resizable bar). If so, we need the steam client to be recompiled for RISC-V and some games... if this RISC-V implementation is performant enough (I wish we would have trashed ELF before...)

Is there an actual U.S. RISC-V CPU that achieves competitive performance? I think the performance leaders are currently based in China.

There's a difference between announcement, offering IP for licensing (so you still have to make your own CPUs), shipping CPUs, and having those CPUs in systems that can actually boot something.

For instance, SiFive in the US, but last time I did check them, their RVA23 CPUs on their workstation boards did not have cache-line size vector instructions (only 128bits aka sse grade I think), RVA23 mandates the same "sweet spot" for a cache line size than on x86_64: 64bytes/512bits.

Box64 already runs Steam (and a good number of games) on RISC-V.

Yep... but RISC-V large and performant implementations won't access the latest silicon process for a good while... better to push for native support to help.

Box64 also runs on LoongArch

China is vested in Loongson.

https://en.wikipedia.org/wiki/Loongson