TSMC is ahead because it adopted ASML's EUV tech earlier than Intel (huge blunder by Intel). The real tech breakthroughs came from ASML, and Intel now has that technology too (and is trying to leapfrog TSMC by being the first to get the new High-NA EUV from ASML, though it won't actually producing sub-3nm chips with it until 2025 or maybe 2026).

> TSMC is ahead because it adopted ASML's EUV

Depends what you mean by "adopted". Pretty sure Intel had EUV prototypes before TSMC (or at least very close), but it was slower to transition its high volume production to it due to execution issues.

> The real tech breakthroughs came from ASML

I know this how the media portrays it now a days but there's so much more to semiconductor manufacturing than lithography, especially since the serious slowdown of lithography scaling with around 193 and 193i litho.

Great example is GlobalFoundry which sent its EUV machine back because it realized it could not compete on the R&D needed to keep up with the other foundries.

> Depends what you mean by "adopted".

by that I mean shipping production chips leveraging EUV

> Depends what you mean by "adopted". Pretty sure Intel had EUV prototypes before TSMC (or at least very close), but it was slower to transition its high volume production to it due to execution issues.

EUV by ASML was not possible until there was a technology to create focusing lenses for it. Intel decided not to "wait" and use their existing technology to beat everyone.

Wasn't the limitation more about light sources? And don't EUV machines use mirrors rather than lenses?

There was recent news of Japan (OIST) developing a new more efficient type of EUV, and also of Canon having a new alternate "nanoimprint" chip manufacturing technology.

https://www.tomshardware.com/tech-industry/japanese-scientis...

https://www.tomshardware.com/tech-industry/new-stamping-chip...

Japan has been working on EUV for a long time but is very far from a working machine, despite developing IP. Notice how that article only mentions simulation tests; very very far from getting all the pieces needed for EUV litho.

On the nanoprint technology: as far as I understand it, this will have economic advantages in trailing nodes but is not currently seen as a way to scale past EUV.

They're working on it, but for some time now ASML has been the only game in town

Semiconductor R&D is very multi-dimensional (despite the media only talking about the one dimensional made up measurement of node size), there are many things Intel could learn from TSMC, and the other way around too.

TSMC and intel are more directly comparable than, say Sony CMOS image sensors.