That was also my experience working in the semi field (in Europe). People working there weren't in it for obscene compensation, they were into it for the hands on puzzle solving of uniquely complex HW problems with cool and rare expensive machinery. Some were quite significantly underpaid and while they knew it they never felt the need to complain too badly about it. I guess it's kind of like arts, which is a shame, because here some publicly traded corporation is abusing you for your passion.

Also, the fact that most of Europe doesn't have many FAANGs and big SW companies paying orders of magnitude more to un-balance the jobs market, surely help to not discourage people from this industry.

So what needs to happen to make this a reality for semi-con? First off, we need cheap, cheap fabrication. I actually looked at public funding in Canada and how that was going to the big name Universities who had their own in-house fab labs (at older process nodes). The costs of someone not in the inside was nuts. The actual cost should be in the 100s of dollars to fabricate a design (considering the marginal costs).

There are people that do this at home but it doesn't work either due to chemicals being pretty dangerous and the need for a bunch of equipment. I bet the amount of money the EU spent on its first metaverse townhall (or whatever it was called .. the thing very few people attended) or a tiny fraction Canada wastes on silly things promoting youth culture or whatever, they could fund a lab that is actually open to the public, with the express mission of promoting hobbyists and education. This will NEVER happen because (a) it needs a professor who is on the inside with a kid-like passion in this tech and a commitment to bringing it to the masses (I see some profs like this at schools like MIT but it is so rare at large, competitive schools like the big ones in Canada), and (b) it does not have an instant payoff for the govt. They don't want dabblers and vague educational outcomes. They want workers with degrees.

I am convinced before I am dead, advances in robotics and fabrication will simply the process (or use home equipment such as future laser printers for printing stencils). I'd love to spend my retirement fabricating my own CPUs :D

Edit:

Let me add: I don't mean the cutting edge process node. I mean the kind of process node that was used to make the very first chips (but less toxic, repeatable, cheaper equipment). If it is possible for synthetic biology, it must be doable for semicon :D

Google / SkyWater / eFabless have this program for 90/130nm chips. That is really old technology from the 2002-2006 time range but it is still useful for a lot of types of chips.

https://opensource.googleblog.com/2022/07/SkyWater-and-Googl...

https://www.skywatertechnology.com/technology-and-design-ena...

https://efabless.com/open_shuttle_program

I am curious what kind of hobbyist chips you want to make that can't be done in an FPGA? You can't do custom analog in an FPGA but these days you can find FPGAs with multiple PCIE / USB / HDMI serdes links, DAC, ADC, etc.

I think the OP isn't even talking about 2006-level capability but rather something akin to 3D printing for semis that approached even early (i.e. somewhere in the 1960's-1980's range) level fab capability for hobbyists. Obviously it doesn't exist currently, but that's the dream for some.

https://github.com/YosysHQ/oss-cad-suite-build

OSS CAD Suite is a binary software distribution for a number of open source software used in digital logic design. You will find tools for RTL synthesis, formal hardware verification, place & route, FPGA programming, and testing with support for HDLs like Verilog, Migen and Amaranth.

Do they not have older, more stable, releases?

just lend some credence to myself here - vitis, their supposed hls offering that turns C++ into RL by magic and genius and oracles, today embeds LLVM 7.0 (released in 19 Sep 2018). gee i wonder how many perf and etc improvements have landed in LLVM since 7 since today LLVM is approach 17.

i could tell you more but it would just spike my blood pressure after 6 months of not having to deal with that mess.

I started working with a Stratix 10 GX dev kit last year, and the Intel Quartus Prime Pro software. It's been a nightmare.

1. Unless you have a direct line to an experienced support engineer inside Intel, technical support amounts to pleading with new-hire support engineers who can't do more than try to look something up and regurgitate it back to you.

2. Sample designs don't work with the tools you have. A design might be for version 18 of Quartus and you have version 23. You can try to auto-upgrade the IP, and maybe 3/4 of the time it works. The other 1/4 of the time it's some obscure error you can't track down, so you're back on the "Community Site" begging for help.

3. Doing something like programming your design into flash on the S10 board involves lots and lots of research, including watching Intel produced YouTube videos.

I could go on, but the whole process is like running in wet cement.

just quit. seriously it's not worth it. no job you have (not even low-latency work in HFT) will compensate you enough to make investing time, blood, sweat, hair, and sleep into this work worth it. there is a better, more rewarding, with an actually transferable set of skills, software job waiting for you somewhere out there.

I knew FPGA compilation could be slow, but this wasn't compilation, this was a ridiculously basic part of the GUI. I knew it had to read my file and analyse the few module dependencies, but seriously, 40 minutes? At that time I just wanted to run simple simulations of small circuits, which shouldn't be slow.

In (open source) Verilator, the same simulations ran from the same source files in just a few millliseconds with nothing precomputed or cached.

I looked into what Xilinx Vivado was really doing and found a log indicating that it was re-running a Verilog read on the changed file several thousand times, each time taking a second or so.

That was such a ridiculous bug for software Xilinx said they had spent over $500M developing. If there were good parts of the software I didn't get to see them due to this sort of nonsense. I think it was fixed in a later version, but due to (yay) enforced licensing constraints I couldn't use a fixed version targeting these FPGAs. That's when I abandoned Vivado and Xilinx (and Amazon) for the project as I didn't have that much spare time to waste on every edit.

I am under the impression the current crop of open source FPGA and especially open source ASIC tools are much better designed.

Just reading that made me nauseous, to think this forced so many trillions of CPU cycles to be spent on nothing, and nobody at Xilinx corrected it until some time later.

There was a time when I could've transitioned to FPGA development and I was pretty keen to do so. But after using (fighting with) Xilinx's tools and watching other people who were deeper into the FPGA side wage similar wars I decided it just wasn't worth it. That it would be better just to stay on the software side of things where the tools are mostly open source and so much better. In FPGA development you just don't have any control over the backend tools - fortunately there are a lot of front-end simulation tools like Verilator that are open source and some limited backend tools like Yosys are open source. Hopefully open source will continue to make inroads, but it's slow going.

I've thought for a long time now that this is an area ripe for disruption. But it's very difficult to disrupt - it hasn't been yet. EDA software is probably the easier part to disrupt. Some open source EDA tools are out there, but not so much on the physical design side.

They don't target the advanced nodes where masks cost as much as the GPs prices (though $20-30M sounds higher than I expected even at the leading edge), but they are workibg their way forward and the space in general is being disrupted at last.

The $20 million is for metal layers only for a respin.

We are moving to 3nm right now which will be even more expensive.

The open source tools can't handle the latest process nodes. Maybe in the future but this is a highly specialized area with tons of NDAs from the fabs for PDKs and DRC decks.

But I don't know how usable they are.

I'd say it technically happened when cheap flash based microcontrollers become available.

Before you had to have *at the very least* EPROM programmer and eraser (or CRT TV I guess) to even put your code onto microcontroller. Flash based microcontrollers meant all you needed is parallel port and some wires to start programming microcontrollers, dropping the barrier to entry by orders of magnitude if you already had PC to program.

Then we had first wave with Basic STAMP and similar making it even easier.

Then it was Arduino that exploded it and there were other factors on that too.

>So what needs to happen to make this a reality for semi-con? First off, we need cheap, cheap fabrication. I actually looked at public funding in Canada and how that was going to the big name Universities who had their own in-house fab labs (at older process nodes). The costs of someone not in the inside was nuts. The actual cost should be in the 100s of dollars to fabricate a design (considering the marginal costs).

Like that. Before making PCB was either doing it at home that took a bunch of time and not everyone wanted to play with chemicals, or expensive to prototype PCB.

Now we have extremely cheap low volume PCBs and even well priced low volume manufacturing options. Same thing with 3D printing, went from massively expensive to affordable.

The problem really is that it's still a bit profitable to do so for companies doing it, while doing same for chip-making would be oh so much harder unless someone put some SERIOUS R&D into making "industrial chip printer" where each wafer could have different set of chips (packaging I guess could be handled by requiring each submitted chip to have connectors in same place). So no mask but some kind of DLP or similar projector to do lithography (dunno if that even possible for anything in hundreds of nm range, just guessing)

i wish

Thinking about the design process, testing and revisions, all the way to fab and then market, we're probably talking years just to see a single design reach your test bench (I'm speculating). Oh and millions, because the major chip fabs only do things in large batches.

Compare this to software. It is, indeed, seconds in comparison.

I'd love for semiconductor fabrication to get fragmented out like it sounds like it will.

Why does it matter for lead times? If 2 fabs with a lead time of few years multiply to 5 with a lead time of few years... your still waiting.

9 women can't have a baby in 1 month, because there is series of necessary processes that has to be undergone and can't be accelerated.

I'm fairly certain the actual lead times to procure semi-custom chips are indeed in the range of a few months. And a fully custom chip is a few years.

AFAIK (but never studied the latest processes), making a mask takes weeks. That means that the minimum lead-time on making masks is weeks long, because there is no interdependence between them. But I'm sure this is one of the steps that add up to years on practice, because of production limitations.

Actually making the chips has a higher floor, because every step is interdependent. With a hundred steps, each one taking half a day, we are talking about 2 months here. There are probably more than a hundred, and a few take more than half a day (but many take less than it), so yeah, I'd easily expect a 4 months minimum. What doesn't compare to years at all.

That sounds like a mature and competitive field. I am suspicious of companies and fields where people aren't working like this. Look at the car industry, or energy, or farming, or shipping, or even aerospace. Only one of every thousand engineers at Boeing will ever decide the shape of an aircraft wing. The other 99% are there to implement and optimize its construction. Any company not spending 99% of its energies on optimization does not operate in a competitive environment and is therefore very likely on borrowed time. Eventually a competitor will appear or an IP monopoly expire and the easy times will be over.

Computers? 100 years old.

What part of any "modern" industry isn't still very very young? even industries like construction that have been around for thousands of years are still relatively young.

Computers and computing? infinitesimal.

For example, the newest gas turbine designs are already exceeding 50% of the maximum theoretically possible efficiency as allowed by thermodynamics. So it doesn't matter how many thousands or millions more years gas turbines are optimized, by us, aliens, future descendants, etc...

No future gas turbine industry in this universe can possibly double the thermodynamic efficiency of the finished product.

I was just listening to an AI podcast and they were duscussing going from the 1 second, 1 minutes, 1 day [unit of response - I cant recall the name of the measurement] -- but I assume thats the "moores law" of AI right now?

And as we get closer to the physical limits of chip production scale/die/etc - I assume they will be scaled horizontally while the GPT-X capabilities will scale volumetric-ally.

Is this a sound assumption?

For example, CNNs were largely known and discovered by the 1990s-2000s, but the compute simply didn't exist yet until GPU manufacturing became commoditized.

OpenAI's massive quantum leap is thanks to the massive corpora they were able to leverage, which until the past 5 years, simply didn't exist.

This is why we've seen massive jumps in Mandarin Machine Translation and Computer Vision from the PRC due to their massive corpora/dataset of English+Mandarin language news from CCTV/CGTN and local surveillance camera data respectively.

This compute limit is a big reason why the US Federal Govt has been working on the Exascale Computing Project for example.

Yes! thats what I mean by scaling VOLUMETRICALLY -- scaling horizontally and vertically are now replaced by volumetrically. (coining a term?)

its going to be an obloid-worping sphere-oid

Thats what I see down the pipe..?

Thoughts, anyone?

Even for training on a massive dataset, you are still limited by compute and processing time (good ole Computational Complexity), which is why HPC projects like the Exascale Compute Project were created in 2015 along with additional funding+research in efficient and alternative data structures.

I highly recommend going down the rabbit hole of High Performance/Accelerated Machine Learning.

The eminence of AI is more 'volumetric' than 'out'

Out scales "up and out like a hill or a lift"

- volumetric is spherical - it presses into the future AND the past (it already has been harvesting history, but created a fire-hosed spigot-interface for the future as well) -- and draws it into its center for eval...

They are different.

Always on the positive expressions of XYZ axis - but had ignored the negative of each, where AGI will go in all dimensions...

See the early shifts from vacuum tubes to semiconductors, from expertly-crafted BJT to crude CMOS, or the rapid march of good-enough architectures in the latest process node clobbering beautiful architectures in older nodes. As the industry has matured and course has stabilized, perfecting the design has grown in importance.

That’s how a company stagnates and eventually gets replaced. Yes operational efficiency and optimization is important, but you only do that if you have a big moat and not much growth ahead of you. You need to spend at least 30% on growth and innovation so you can stay relevant. Higher if you are the one trying to replace the 99% ones.

Not every industry is like software/tech. And the tech industry is already moving towards a "mature and competitive field" model. Otherwise why is Google and Meta cutting all their unnecessary spending and touting efficiency over growth? (besides AI tech, I suppose) Why all the layoffs?

Curious what was your experience operating in those fields.

Shit like "we did chain driven timing and it worked, but in new engine it prematurely wears", or "someone decided it is fine for belt-driven timing to take dip in oil, oh surprise, we now have parts of the belt landing in various parts of the engine".

Or my favourite, "metal, belt driven water pump is almost never replaced thru the lifetime of the engine and it's cheap, let's make propellers plastic and also drive it from separate electric engine"

I suggest there's a kind of 'cultural imperative' in Korea that is so different from the US that it doesn't even begin to factor into our equations.

My Korean grad school colleagues went to intern at Samsung for serf pay, the only way that could work is if there was some kind of culturally implied merit.

The US also needs a 'different kind of ethos' to compete in semiconductor, Cali Surfer Vibes won't cut it, neither will NY banker vibes, neither will SF Social Media AI Allbirds vibes, nor Cambridge High Intellectual Healthcare Conference vibes, nor Texas Energy Industry or DC Government Consultant etc..

And that will be impossible without a fair number of migrants who will be mostly Asian - so where is this going to happen?

Maybe they need a 'New South Valley' about 50Km south of San Jose, a cross between Orange County, Silicon Valley, Cambridge, and Seoul aka Cali, but slightly more formally regimented, a bit like the actual old-school Silicon Valley which was at the time, away from the buzz, a bit of a sleepy burb where people focused on hard stuff and economics mattered.

If someone like Netflix/HBO did a proper documentary with Samsung about their LSI fab in Texas, HR would have more applicants than they would know what to do with. This 'ethos' can be created. I saw what it could be like when I worked there. I really believe seeing the whole thing in action is the primary selling point. The draconian security makes sense once you walk that catwalk and witness with your own 2 eyeballs what is at stake. Capturing this sensation for the masses is the challenge.

Americans will not work for fractional pay unless it's a kind of a 'wartime' / 'emergency' situation.

Wait till you hear about the history of the semiconductor industry!

This is really what pushed me into just doing digital design as a hobby and making my money elsewhere. It's understandable that chips companies are so risk averse (a bad tapeout or, worse, a major escape can cost the company billions) but it is really a miserable experience to have so much passion and ambition but never being able to do anything other than extremely conservative incremental changes over a decades long career.