We've been reliant on node shrinks to push things further. That hard limit is 0.2nm (silicon atom size) we are at ~2nm gate features.
It remains to be seen if we can get to that 0.2nm size, I honestly don't think we can push much further past the 2nm size (I'd imagine 0.5nm will be the limit).
That, to me, is very much being "in sight".
First, how do you cool such a chip? Sure, you could add a bunch of transistors but the thermal costs per transistor will stay the same. Assuming similar design but adding 20 layers, how would you account for your CPU now consuming 600W?
Second, The tech doesn't exist. The problem we have is that layering chips today is basically growing crystals in a controlled fashion. Defects in lower layers spoil upper layers. Today that's already a problem (CPUs today have ~7 or 8 layers). Can you imagine the problem of 20 or 30 layers?
Who knows, maybe we'll come up with solutions to both problems, but that's a big maybe. My bet is that instead we focus on architecture designs. We revisit old but deemed too expensive concepts like an async CPU.
See 3d nand flash cells, see stacked cache and HBM memory. All the usual characters are working on it. Intel, AMD (TSMC), Samsung.
Cooling is an issue, but there are solutions.
There's a reason memory can generally beat computational cores to smaller node sizes. It's because highly uniform circuits are much easier to manufacture. A lot of problems present in CPU logic cores (such as cross talk) just aren't present to the same extent in NAND cells.
It may be a simple typing problem, but Wikipedia doesn't seem to have it.
No, I think x86 passed 14+ layers at least half a decade ago.
It does not reduce price per transistor because each layer still has to be manufactured the same way
The silicon is not actually the expensive part.
We are not yet close enough to the end to say where it is, so that's out of sight IMHO.
The entire reason cloud service providers are looking at and advertising ARM racks is the power savings from operating them.
Which notably mentions performance. I have often interpreted Moore's Law to be the fact that doubling improvements in performance will continue roughly every 16-18 months, but not always directly proportionally to transistor count -- other ways to squeeze out doubling performance gains arise and often in unexpected places.
Moore's law was an observation by Gordon Moore, co-founder of Intel, relating to the doubling of transistors per densely integrated circuit chip every 24 months. Originally, it was every 12 months, then every 24 months, etc.
Moore's second law, which isn't as well known, relates to the exponentially increasing capital cost of manufacturing ICs.
https://en.m.wikipedia.org/wiki/Moore's_law
Would be interested to know if the process inside Oxford's is as precise to distinguish, or if they intentionally dumbed it down.
The thing people mean when they are talking about the deceleration of single-threaded CPU performance is actually Dennard scaling. Dennard said that density and power efficiency were complementary in such a way as to keep areal power constant. That was true until it suddenly stopped being true. If Dennard scaling had continued you'd be using a 20GHz CPU right now.
I get where you are coming from, but this is one of the most aggravating types of comments.
On the curve you can find:
- Ultimate Computer is the computer using the best hardware as allowed by the physical constants of our universe. See also physics of computation.
- Inclusions are in essence 'pocket universes'. They are created for specific entities to run hardware in a dedicated universe with physical constants different from ours, allowing for better performance than those in our universe
- Ultimate Inclusion is the inclusion with the best possible set of physical constants in the entire multiverse
Seth Lloyd wrote a paper "Ultimate physical limits to computation" [2].
[0] https://en.wikipedia.org/wiki/Perfect_Imperfection
[1] https://en.wikipedia.org/wiki/Perfect_Imperfection#/media/Fi...
Look again. Moore's law in terms of single threaded performance is dead. In literal terms of number of transistors on a wafer, it's still increasing exponentially, just slower. And in terms of what mattered when people cited Moore's law, the decrease in price/performance, it's still exponential, just slower and multi core.
It will end, as all exponential trends must end lest they consume the universe, but the end is not yet in sight. Recently chips have started to go multi chip and three dimensional. So even when we finally hit that scaling limit, we haven't quite reached the end of exponential progress.