Is it because demand is higher for CPUs with low core-counts? I understand this argument in the consumer PC space, but what about in the datacenter?

Maybe companies which operate datacenters are too focused on horizontal scalability and stopped caring about vertical scalability? Surely this will change in the future? There are factors like power consumption and floor realestate to consider - From an electricity and realestate perspective, it is increasingly efficient to run your software on as few machines as possible (each machine having more CPU cores).

Am I right to believe that eventually companies will start writing/using software which leverages multiple CPU cores (when the cost benefits outweigh the hassle)?

Why is it not popular to scale both horizontally AND vertically?

I would be really interested in hearing ideas.

I started thinking about this after noticing that Amazon EC2 instance prices grew linearly as you doubled memory and CPU resources... I expected a sub-linear growth.

Budget-conscious projects use 180 nm. [1] [2]

[1] http://info.scichina.com/sciFe/EN/10.1360/112010-977

[2] http://www.greenarraychips.com/home/about/

Look for "cost metrics" table, "cost per million transistors".

As or intel: they claim they can make cheaper transistors, but yet their cpu's don't reflect that. Also they've offered manufacturing services for some time, but nobody taken , and that's pretty weird if they are so cheap beyond industry.

So many in the industry don't think it is true.

New CPUs during the clock speed doubling era had moderate increases in transistor count to accommodate new features. Now that clock speed increases have stalled, adding on more stuff is the only way to differentiate new products.

* Physics stopped CPUs from advancing any further.

* When CPUs used to advance they almost cost the same, that's why once they reached a new milestone they never looked back to produce slower CPUs.

* Adding a number next to "i" will make costumers pay more for pretty much the same CPU.

* There's only major CPUs manufactures and all CPUs they make are sold anyway so they start by mass production from day one.

I work in Intel's Failure Analysis division, and we're expanding pretty aggressively. Same job, three times as many resources, much more money involved. It just keeps getting smaller.

They're trying to make a comeback with Zen, but one of the biggest issues with development is that you learn from the successes and failures of your previous product. If your previous product sucked, you're under an enormous amount of pressure to fix those problems before you even get started on your next generation. Otherwise, those problems will persist, and you'll get new problems as well.

They've stayed relevant in the GPU market, though.

I am mainly using it to compile software though, which makes good use of multiple cores, probably closer to a "server" workload than a "desktop" one.

I just picked up the AMD Vishera -- 4.2 Ghz, easily overclockable to 4.5 with a proper cooling system, for $90.

For comparison, an Intel Core i3 4350 at 3.6 Ghz runs $205.

And in APU (or "non-mobile SoC", if you will) market too: Xbox1 _and_ PS4 - that's a huge success by any measure.

However, Moore's Law is clearly dying, despite what Intel wants to claim. The gaps between new process nodes is increasing, which is far more important than transistor count, as this is also affected by how large you make the silicon that holds your transistors.

That begs the question of what we determine to be low-hanging fruit. An engineer in 2030 may look back on the time now and see the 2016 advancements as 'low-hanging fruit' relative to their time. Unless you think there's not much of a future in chip fabrication (in which case, you may want to tell Intel).

As I see it, Moore's Law is a rough metric coined by someone almost half a century ago. Just because the metric is no longer relevant, that doesn't mean the increase in complexity is slowing.

On the front end, as we figure out what makes a phone more "sticky" we expect that battery life must continue to increase, despite the fact that the device is now always listening, always recording our steps and activity, in constant contact with a radio base station thousands of feet away, and has the same number of pixels as an HDTV, which itself is now obsolete when compared to 4K displays.

One of the points of the original article is that this continued increase in efficiency can continue (and therefore the Intel business model can continue to be viable). They're having no to throw a supercomputer at the problem, among other things, however.

I'd postulate that the low hanging fruit came in two forms.

The first being advances in general purpose CPUs by increasing the number of transistor. So, we're about to hit the hard limit in that regard.

The second, being the design of software under the assumption that CPU speed will continue to increase linearly.

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Hardware:

Currently, the majority of systems architectures are designed to be general purpose. The exceptions being GPUs for parallel processing and ASIC for specialized tasks like encoding/decoding media formats.

The next generation under currently under development is SoC (Systems on a Chip). Ie SoC is the complete hardware infrastructure contained on a single chip. They run cooler, are more power efficient, and are faster in terms of passing data via the internal cache layers.

What may come after is a combination of SoC and dynamically configurable hardware architecture similar to how FPGAs work today. The combination of the cloud gaining mass appeal as well as IoT taking root (despite all the hype), a market will grow for chips with a combination of very predictable performance characteristics and specialized capabilities.

With dynamically configurable hardware you could bootstrap a system and tell it to specialize as a graph database node, a media encoding/decoding cluster node, a Smart TV platform, a smart car CPU, etc. There's already talk of neuromorphic chips that can dynamically change/adapt to a specific environment.

The other direction I see room for growth is communication speed. I've heard some about using optics as a communication bus on multi-layered chips. Material manufacturing seems to be the issue. If somebody were to come up with a solution then enabling on board optical communication busses could have a huge impact on IO performance/latency.

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Software:

We're at the tail end of 3 decades of unrestricted software glut. Every system commonly available today runs on a general purpose monolithic architecture. With a ton of legacy glut and a huge surface attack surface for security vulnerabilities.

General purpose OSes won't go away for personal workstations but there's a lot of room for improvement when it comes to special purpose platforms. I've already been mocked on twitter for it but I think Unikernels will be the next major advancement in software for non-general-purpose systems.

Instead of installing a huge bloated software platform and configuring it to run your code. The OS will be reduced in size to the point where it can be versioned in source control and setup as a step in the build process.

NodeOS is one example of this. It uses a very tiny Linux kernel stripped of everything except the absolutely bare minimum foundation. It has a scheduler, dynamic memory management, enough of a HAL to run on a VM, and a basic network stack. Everything else runs on the V8 VM, including POSIX utility equivalents written in JS.

That's just Node. There are unikernels for a wide range of different languages. There's even the Runtime.js project which is working to implement even the underlying kernel from scratch in pure JS.

The Raspberry PI platform has proven beyond a reasonable doubt that there's a gaping middle ground (and potential market) between embedded programming and general purpose platforms.

I think the greatest potential for future performance gains will come from cutting out the old cruft and optimizing on what we use today.

I tend to read anything and everything I can get my hands on. Occasionally I stumble on something unique that's worth a deeper look. Very rarely that something appears to have the potential to drastically improve upon the current way of doing things.

At this point I don't really have any credibility in the tech community so I don't concern myself much with losing what I don't have. I assume people perceive me as the tech nerd equivalent of the crazy homeless guy on the corner holding a cardboard that says 'they're coming'.

Intel needs a serious competitor, otherwise we won't get it by 2020. Is Intel waiting for AMD/ARM/Mips/etc to catch up (and milk the customer) so they produce faster CPUs they probably already have in various stages (prototypes).

https://en.wikipedia.org/wiki/Instructions_per_second#Timeli...

To see an example of why GHz isn't an accurate way to look at performance, compare these two:

Pentium 4 Extreme Edition - 9,726 MIPS at 3.2 GHz

Intel Core i7 5960X - 238,310 MIPS at 3.0 GHz

That said, it is possible to have CPUs that exceed 4GHz. Heat is the issue you need to overcome.

Here's an Intel's Core i7-4770K, overclocked to 8GHz:

http://www.tomshardware.com/news/Intel-Haswell-Overclock-i7-...

Comparing your Intel Core i7 5960X with the old 2004 Pentium 4, single thread performance:

  Intel Core i7-4790K @ 4.00GHz  ... 2529 
  Intel Pentium G3258 @ 3.20GHz  ... 2172
  Intel Core i7-5960X @ 3.00GHz  ... 1991
  Intel Pentium 4 @ 3.80GHz      ...  824 
  Intel Atom 230 @ 1.60GHz       ...  238 

Vector processors like the Cray-2 are very awesome and had huge amounts of main memory. We will see nVidia does with their GPUs and AMD does with their APUs that works great already in PS4/XB1.

(MIPS and GFLOPS measurements depend on the benchmark implementation and the used language/compiler/etc.; and they show unrealistic PEAK results, rather than real world performance) LINPACK benchmarks (Fortran based) is better than MIPS AND GFLOPS too, "The performance measured by the LINPACK benchmark consists of the number of 64-bit floating-point operations, generally additions and multiplications, a computer can perform per second, also known as FLOPS. However, a computer's performance when running actual applications is likely to be far behind the maximal performance it achieves running the appropriate LINPACK benchmark" https://en.wikipedia.org/wiki/LINPACK_benchmarks

(Not saying 10+GHz is necessarily impossible, just that it's more likely hitting it is hard than Intel doesn't want to innovate there for some reason.)

And releasing a new architecture is not exactly feasible if they want to stay in the server, workstation, and desktop markets. That idea behind Itanium actually was to get faster by dropping x86_64, and we see how poorly it worked out.

Increase clock frequency or do more per clock.

Increasing clock frequency is tricky because you end up spending more and more of chip area to keep the clock in sync, and the chip will also run hotter unless you also manage to lower voltage drastically (which has its own problems); I don't know what it's like these days, but one of the DEC Alpha CPUs spent 40% of the die area just to keep the clock stable (because basically "everything" on the chip is contributing to skewing the clock one way or the other)

You may have noticed that clock speed increases have tapered off drastically. They're hard to do without ridiculous power usage. IBM's POWER CPUs still chase clock speed, because they're not as limited by the same constraints (targeting very specific niches).

The other alternative is to do more per cycle. That means trying to squeeze out whatever parallelism you can from the instruction stream and executing as much as you can in parallel. To be able to execute in parallel, you need multiple copies of various parts of the logic so each copy can process part of the work for one instruction.

I would think that a customer doesn't particularly care if the clock is fluctuating 100MHz.

1) More transistors per unit area means that they're smaller, which means (all other things being equal, which is far from a good assumption for the past several shrinks) that it takes less energy to switch them, which in turn ideally means that they can also be switched faster.

2) More cache fits on a die of a given size/price.

There are also other ways to get speed from more transistors. For example see speculative execution.

"Moore's law (/mɔərz.ˈlɔː/) is the observation that the number of transistors in a dense integrated circuit doubles approximately every two years. "

Sentiment of "good enough" can break the law unless we continue finding compelling reasons to buy more horsepower. 8K VR anyone?