Re:Moore’s Law Not Dead – Intel’s Use of HPC to Keep It Alive
by scott_s on Tuesday January 12, 2016 @11:09AM
(#10888166)
Excellent explanation, but I think it's missing a simple point yummybear may not know: "transistors" are the unit with which we build logic on processors. More transistors means more logic on the chip. More logic on the chip means you can do more. For a long time "do more" meant "execute a single stream of instructions faster", but that hit a wall because of the reasons vidarh explained. Now "do more" tends to mean "execute multiple streams of instructions".
Re:Moore’s Law Not Dead – Intel’s Use of HPC to Keep It Alive
by revelation on Tuesday January 12, 2016 @04:16PM
(#10890466)
Why is it important to keep the clock stable? Or rather, what level of stability are we talking about?
I would think that a customer doesn't particularly care if the clock is fluctuating 100MHz.
Re:Moore’s Law Not Dead – Intel’s Use of HPC to Keep It Alive
by nikdaheratik on Tuesday January 12, 2016 @08:41PM
(#10891764)
The clock is used to move items along the processing pipeline (between one set of transistors and another). If you don't keep everything in sync, then instructions get executed out of order and that's bad, obviously.
Increase clock frequency or do more per clock.
Increasing clock frequency is tricky because you end up spending more and more of chip area to keep the clock in sync, and the chip will also run hotter unless you also manage to lower voltage drastically (which has its own problems); I don't know what it's like these days, but one of the DEC Alpha CPUs spent 40% of the die area just to keep the clock stable (because basically "everything" on the chip is contributing to skewing the clock one way or the other)
You may have noticed that clock speed increases have tapered off drastically. They're hard to do without ridiculous power usage. IBM's POWER CPUs still chase clock speed, because they're not as limited by the same constraints (targeting very specific niches).
The other alternative is to do more per cycle. That means trying to squeeze out whatever parallelism you can from the instruction stream and executing as much as you can in parallel. To be able to execute in parallel, you need multiple copies of various parts of the logic so each copy can process part of the work for one instruction.