Increase clock frequency or do more per clock.

Increasing clock frequency is tricky because you end up spending more and more of chip area to keep the clock in sync, and the chip will also run hotter unless you also manage to lower voltage drastically (which has its own problems); I don't know what it's like these days, but one of the DEC Alpha CPUs spent 40% of the die area just to keep the clock stable (because basically "everything" on the chip is contributing to skewing the clock one way or the other)

You may have noticed that clock speed increases have tapered off drastically. They're hard to do without ridiculous power usage. IBM's POWER CPUs still chase clock speed, because they're not as limited by the same constraints (targeting very specific niches).

The other alternative is to do more per cycle. That means trying to squeeze out whatever parallelism you can from the instruction stream and executing as much as you can in parallel. To be able to execute in parallel, you need multiple copies of various parts of the logic so each copy can process part of the work for one instruction.

I would think that a customer doesn't particularly care if the clock is fluctuating 100MHz.

1) More transistors per unit area means that they're smaller, which means (all other things being equal, which is far from a good assumption for the past several shrinks) that it takes less energy to switch them, which in turn ideally means that they can also be switched faster.

2) More cache fits on a die of a given size/price.

There are also other ways to get speed from more transistors. For example see speculative execution.

"Moore's law (/mɔərz.ˈlɔː/) is the observation that the number of transistors in a dense integrated circuit doubles approximately every two years. "