Re:Micron Introduces 128 GB DDR5-8000 RDIMMs with Monolithic...
by wtallis on Monday November 13, 2023 @12:19PM
(#38252613)
Additionally, on-die ECC isn't unique to DDR5; it's a necessity for any DRAM built on the most recent high-density fab processes. It was used for at least some LPDDR4 memories, and probably most or all LPDDR5.
Re:Micron Introduces 128 GB DDR5-8000 RDIMMs with Monolithic...
by jakobson14 on Monday November 13, 2023 @03:23PM
(#38254887)
Can't wait to see another round of rowhammer papers trashing these things. XD
Re:Micron Introduces 128 GB DDR5-8000 RDIMMs with Monolithic...
by dazed_confused on Monday November 13, 2023 @09:28PM
(#38258218)
Row and col lines are so close nowadays; you are fighting physics... Older processes didn't have this problem due to row isolation.
Re:Micron Introduces 128 GB DDR5-8000 RDIMMs with Monolithic...
by jakobson14 on Tuesday November 14, 2023 @02:17PM
(#38268102)
It's not the selection lines, up on higher metal layers. It's the actual memory cells themselves being too close together on the substrate.
What I’ve read is that DDR5 has “on-die ECC” which means that the module itself handles the error correction, but then it can not handle errors that happen in transit to the CPU as full ECC can.
There are DDR5 full-ECC modules that would be real equivalents to DDR4 ECC.
> When the latest version of DDR memory – DDR5 – was introduced in 2020, marketing campaigns got one important fact wrong. DDR5 UDIMM, the regular desktop RAM we’re all familiar with, was touted as having “built-in” Error Correcting Code (ECC). Not true. What it has is built-in data checking, which is a very different feature that shouldn’t be confused with traditional ECC. For that, your customers will need DDR5 ECC UDIMM memory.
— Intel, “Error Correcting Code (ECC) vs. Built-in Data Checking”: https://www.intel.com/content/www/us/en/content-details/7549...