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Re:TSMC starts volume production of 3nm chips by paulmd on Thursday December 29, 2022 @08:38PM (#34180647)
N3 is actually much worse than expected, it’s essentially a marketing node to satisfy contractual obligations and the expected gains from N3 won’t actually be reached until N3E in another year+.

This means that Samsung’s N3P (with GAAFET) will match their density and release timeline…

https://www.notebookcheck.net/TSMC-reportedly-ditches-its-N3...

https://www.semianalysis.com/p/tsmcs-3nm-conundrum-does-it-e...

https://fuse.wikichip.org/news/7048/n3e-replaces-n3-comes-in...

Even TSMC is hitting diminishing returns, and costs are spiraling faster than density - N3 alone is 50% more expensive than N5, both in wafer and validation/tapeout costs, and remember that’s the fake N3 now and the real N3E will undoubtedly be even more expensive.

Rumors are that all 10 of TSMC’s top-10 customers have cut their orders next year and they have 50% less utilization than expected, which is really bad for the node economics. So TSMC may finally have found the point at which costs have spiraled past consumers’ willingness to pay.

https://www.techpowerup.com/302774/top-10-tsmc-customers-sai...

Re:TSMC starts volume production of 3nm chips by senttoschool on Thursday December 29, 2022 @09:43PM (#34181178)
Don't costs for nodes decrease over time?

IE. N7 was much more expensive when it first launched than compared to now? And TSMC prices its wafers based on supply and demand so eventually, N7 will become very cheap.

Also, it's not a surprise that the top 10 TSMC customers have ordered less. It probably has way more to do with a massive inventory of unsold phones and computers, chip glut, and lower projected consumer demand. N3 pricing wouldn't make an impact in 2023.

Re:TSMC starts volume production of 3nm chips by wmf on Thursday December 29, 2022 @10:51PM (#34181578)
Yes, but the relative prices may remain the same such that N3 is always more expensive per transistor than N5.
Re:TSMC starts volume production of 3nm chips by whoIsYou on Thursday December 29, 2022 @10:15PM (#34181379)
> N3 is actually much worse than expected > ~30% higher density in real-world products

I'm a software guy so excuse my ignorance, but isn't 30% higher density a pretty big deal? Why is N3 worse than expected? Were expectations sky high and expectations weren't hit, or is 30% density increase not as big of a deal as it sounds to me.

I think a lot of people may not understand how density increases relate to performance improvements

Re:TSMC starts volume production of 3nm chips by icegreentea2 on Friday December 30, 2022 @09:03AM (#34185054)
It's the combination of density and cost increase that's the problem. I don't have the actual N3 numbers, but taking the original example, if you get 30% increased transistor density, but your cost per area goes up 40%, then as a customer you're not in a great position - you're still paying more per transistor.

While there are still other benefits to gain from a new node and increased density (despite the cost increase), if your cost per transistor goes up, it limits where you might want to use the new node (particularly in value sensitive parts of the market).

There's been a long-term trend towards this point - the cost of a new node (the blend of developing it, implementing a design in it, and cost per transistor) has been spiralling up for like a decade+. These are the same pressures that has caused the consolidation around Intel/TSMC/Samsung(ish) in the bleeding edge.