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Re:TSMC starts volume production of 3nm chips by TillE on Thursday December 29, 2022 @06:16PM (#34179420)
Bigger L1/L2 caches is definitely another "easy" thing with substantial benefits, but doing it cheaply is hard.
Re:TSMC starts volume production of 3nm chips by sroussey on Thursday December 29, 2022 @06:44PM (#34179673)
Those caches are SRAM which has not improved much the last few generations.
Re:TSMC starts volume production of 3nm chips by wmf on Thursday December 29, 2022 @10:53PM (#34181589)
That's not easy at all because larger caches are slower. A higher hit rate with worse latency can give worse performance. We may see more levels of cache to better optimize the tradeoffs.