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Re:Rendering on the Apple M1 Max Chip by zozbot234 on Tuesday October 26, 2021 @04:02AM (#28997602)
RISC-V has a few ISA advantages over ARM64 (mainly the variable length instructions, which provide instruction density that's comparable with x86 while still being very easy to decode) but meaningful competition would have to come from something more like the upcoming Mill architecture - VLIW-like power efficiency with the same flexibility and IPC as current OOO designs.
Re:Rendering on the Apple M1 Max Chip by floatboth on Tuesday October 26, 2021 @06:28AM (#28998575)
RISC-V has some bad ISA disadvantages like needing three (!) instructions for array indexing: https://gist.github.com/erincandescent/8a10eeeea1918ee4f9d99...

Isn't Mill eternal vaporware?