I personally would love to see a frontend architecture that more closely resembles the backend: dataflow execution. It's been researched in the 80s/90s, with some hybrids popping up in literature from time to time (TRIPS, ADAM, etc)

Counterpoint: processors have gotten so good at extracting ILP from a sequential ISA that I wonder how much benefit you would gain from a dataflow ISA. The downside is that it would require to completely rethink and redo the software stack. (efficient par to seq is just as hard as efficient seq to par)

This is interesting.

The new architectures could also support new programming languages where single instruction multiple data and parallelism would be easier.

Get rid of all the sequential part.

Like Itanium!

We already have x86-64 (guarded licenses), ARM (less guarded but still uncertain) and SPARC, Power, RISC-V (open source).

Should a new ISA be the focus of major economic plans? Maybe if one of the objectives is protectionist ISA licensing, but that seems like an insular mistake.

An ISA ecosystem is a lingua-franca, so choosing a well established one is the most sensible basis for growing different semi/IT industry flows around.

In terms of discovering new technical benefits, new ISA's should be explored in academic circles and startups where they won't waste everyones time and money on boondoggles.

This might apply less to microcontrollers.

Agner Fog has been researching this very question.

https://www.forwardcom.info/

That sounds interesting. Forwardcom designed for forward compatibility.

Maybe the Mill? https://millcomputing.com/

edit: added link.

As interesting as the Mill looks on paper, it's hard to keep faith in this architecture ever coming to fruition with the decreasing press coverage [1] (8 articles in 2013, only 1 each in 2014, 2015, 2017, several about fund seeking) and lack of activity in the Implementation section of their Forum [2] (one nearly 1 year old thread and others nearly 3 years old or more).

[1] https://millcomputing.com/in-the-press/

[2] https://millcomputing.com/forum/the-mill/implementation/

Sounds like Transmeta.

Anyway, these alternative/exotic computing models also remember flops like the old Transputers. But it is necessary to invest in those anyway.

While the Transputers vanished eventually, their legacy is living in absolutely all modern multi-socket workstations and servers.

The Transputer method of partitioning a multiprocessor system, into processor chips provided with memory interfaces (now DDR), I/O interfaces (now PCIe) and communication interfaces for interconnections with the other processors, instead of using shared buses as before, was revived in some later DEC Alpha CPUs, then it was used in AMD Opteron (many AMD designers came from DEC Alpha), and then it was adopted by Intel (in Nehalem) and by everybody else.

Yes, Inmos disappeared but their legacy totally lives on.

They’re never going to finish it though.

Here is how it could look: https://www.crowdsupply.com/sutajio-kosagi/precursor

RISC-V bleeding edge?

In avoiding the morass of stupid patent rulings that allow manufacturers to camp on an ISA.

There is no reason that anyone shouldn't be able to take someone's databook for a processor and produce a legal work alike. But since we can't do that.

The whole industry is forced to create a new ISA for the sole purpose of saying it is ok to produce work-a-likes.

Cutting edge, but in legal maneuvers.

Also: not an architecture, an instruction set.