Re:FPGA: Why So Few Open Source Drivers for Open Hardware?
by rjsw on Thursday June 11, 2020 @01:25PM
(#23491106)
The title suggested to me that they were looking for Linux/BSD drivers for IP within an FPGA, either connected to a CPU using PCIe or for an ARM/FPGA hybrid.
[ Parent
| on HN ]
Re:FPGA: Why So Few Open Source Drivers for Open Hardware?
by imheresamir on Thursday June 11, 2020 @01:52PM
(#23491449)
Is that not what the author is referring to?
From the readme of his LiteDIP project[1]: "Plug-and-play LiteX-based IP blocks enabling the creation of generic Linux
drivers. Design your FPGA-based SoC with them and get a (potentially upstream-able) driver for it instantly!"
Re:FPGA: Why So Few Open Source Drivers for Open Hardware?
by rjsw on Thursday June 11, 2020 @02:29PM
(#23491847)
There isn't anything there apart from the readme.
I built a descriptor block into a FPGA design about 15 years ago, this was for PCI so I could put it at a fixed offset into the BAR for every device.
I don't see how the "get a (potentially upstream-able) driver for it instantly" would work. Someone would still need to write a driver, you just get a way to probe for whether to attach it or not.
Re:FPGA: Why So Few Open Source Drivers for Open Hardware?
by mupuf on Thursday June 11, 2020 @03:28PM
(#23492484)
Sorry about that, the project is still very early. Check out the fan_wip branch for actual code.
The point of LiteDIP is to provide both the IPs, and their drivers.
Also, rather than needing IPs to be located at a certain address in any sort of bus (PCI BARs, wishbone, ...), litedip exposes the list of IPs starting at address 0 along with their version and relative address.
The driver then lists these blocks, and either has a driver for this block's version or not.
Re:FPGA: Why So Few Open Source Drivers for Open Hardware?
by mshockwave on Thursday June 11, 2020 @01:38PM
(#23491277)
i agree it's kind of confused. But from a compiler dev perspective (which i think is closer to OP's perspective), driver means a piece of software that put together components / tools and bootstrap the processing pipeline