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Re:Chipmakers Test Ferroelectrics as a Route to Ultralow-Pow... by xt00 on Friday March 16, 2018 @01:23PM (#16602257)
Supriyo Datta is a pretty top level semiconductor theory guy, so its a good chance theoretically this could work, but the place where tons of issues have come up over the years in using new materials is that they often lead to quality or defect issues in the manufacturing process that takes years to figure out.
Re:Chipmakers Test Ferroelectrics as a Route to Ultralow-Pow... by deepnotderp on Friday March 16, 2018 @01:24PM (#16602265)
Fwiw, Chenming Hu is a proponent of NC-FETs as well.

Also, GloFo has already fabricated FinFET NC-FETs.

Re:Chipmakers Test Ferroelectrics as a Route to Ultralow-Pow... by xt00 on Friday March 16, 2018 @01:29PM (#16602300)
oh interesting, was not aware of the term NC-FET -- so basically the ferroelectric material gives it the negative capacitance behavior... interesting.
Re:Chipmakers Test Ferroelectrics as a Route to Ultralow-Pow... by deepnotderp on Friday March 16, 2018 @02:22PM (#16602797)
Yup, the NC-FET essentially has the NC and positive capacitor in series to get a voltage amplifier, a clever way of subverting the Boltzmann limit :)
Re:Chipmakers Test Ferroelectrics as a Route to Ultralow-Pow... by xt00 on Friday March 16, 2018 @01:25PM (#16602274)
Also funny, I spent months trying to buy his book for one of my semiconductor device physics courses that was out of print, and finally bought it for like $180 on ebay.. it actually was worth it.. really well written book..
Re:Chipmakers Test Ferroelectrics as a Route to Ultralow-Pow... by felipemnoa on Friday March 16, 2018 @05:31PM (#16604180)
Could you please name the book for those of us that may be interested?
Re:Chipmakers Test Ferroelectrics as a Route to Ultralow-Pow... by philipkglass on Friday March 16, 2018 @08:59PM (#16605046)
I'm not xt00, but based on age/out-of-printness I'm guessing it may be Datta's 1989 book "Quantum Phenomena (Modular Series on Solid State Devices, Vol 8)". His 1986 book "Surface Acoustic Wave Devices" is a distant second-best possibility, depending on what was in that one semiconductor device physics course.

Everything else seems to be in print still, though some are expensive (as typical of specialized books).

Re:Chipmakers Test Ferroelectrics as a Route to Ultralow-Pow... by xt00 on Saturday March 17, 2018 @01:26PM (#16608003)
Was definitely part of the modular series, a small dark blue book.

It’s this one as the previous poster said. "Quantum Phenomena (Modular Series on Solid State Devices, Vol 8)".

It’s referenced to by many other books from what I recall. So I decided to go hunting for it — and found that the explanations in Datta’s book were better than many of the books that came after it. I’ll see if I still have the book someplace.

Re:Chipmakers Test Ferroelectrics as a Route to Ultralow-Pow... by philipkglass on Saturday March 17, 2018 @05:24PM (#16609132)
There's also a decent scan of the book available via b-ok.org.
Re:Chipmakers Test Ferroelectrics as a Route to Ultralow-Pow... by baybal2 on Friday March 16, 2018 @12:06PM (#16601544)
>Some researchers have predicted that transistors built with ferroelectrics will never exceed 100 megahertz. And some think that building these devices will require very thick layers of ferroelectrics—too thick to be practical.

Wast amounts of low power MCUs are still built to function in single MHzs. A jump from milliamps to microamps is not a small deal.

Re:Chipmakers Test Ferroelectrics as a Route to Ultralow-Pow... by userbinator on Saturday March 17, 2018 @12:01AM (#16605547)
Less than 1MHz is also very common - some MCUs have the option of running from the 32kHz RTC oscillator in low-power modes.
Re:Chipmakers Test Ferroelectrics as a Route to Ultralow-Pow... by Lind5 on Friday March 16, 2018 @01:40PM (#16602406)
Momentum is definitely building on this, although still very much in the R&D phase https://semiengineering.com/a-new-memory-contender/
Re:Chipmakers Test Ferroelectrics as a Route to Ultralow-Pow... by pjc50 on Friday March 16, 2018 @12:13PM (#16601594)
I wonder how this is related to Ferroelectric RAM, which offers nice properties along all axes except density?
Re:Chipmakers Test Ferroelectrics as a Route to Ultralow-Pow... by deepnotderp on Friday March 16, 2018 @12:58PM (#16602024)
So in NCFETs there is something called capacitance matching which is basically the value of the negative capacitor compared to the value of the positive capacitor.

When you have different values, then you can get NCFETs, and in different values, you get FRAM.

In FRAM you get states stored in the polarization of the atoms in the ferroelectric layer.

Re:Chipmakers Test Ferroelectrics as a Route to Ultralow-Pow... by hoosieree on Friday March 16, 2018 @03:32PM (#16603380)
Is anyone putting R&D into this besides Global Foundries? I've seen their name pop up in every spintronics announcement lately.
Re:Chipmakers Test Ferroelectrics as a Route to Ultralow-Pow... by zitterbewegung on Friday March 16, 2018 @03:36PM (#16603417)
Probably not since there aren't enough competitors left to actually invest in chips. If you don't hear Intel, TSMC or Global Foundaries putting R&D into something then you have the way out there research of academia.

Maybe a random startup or two are investigating this but those are academics that figured something out from a grant and are attempting to make a company out of it. The road to beating silicon is a long one.

Re:Chipmakers Test Ferroelectrics as a Route to Ultralow-Pow... by teemwerk on Friday March 16, 2018 @07:30PM (#16604733)
TI and Cypress through Ramtron has done quite a bit of work incorporating ferroelectric materials into CMOS processes and such for FeRAMs mostly. Obviously RAMs are not transistors but the work is certainly relevant. Like the article says, the large feature size for ferroelectrics has mostly been the limitation for ferroelectric applications.
Re:Chipmakers Test Ferroelectrics as a Route to Ultralow-Pow... by deepnotderp on Friday March 16, 2018 @04:06PM (#16603640)
GloFo is a major proponent of MRAM not sure how invested they are in spintronics in the general.
Re:Chipmakers Test Ferroelectrics as a Route to Ultralow-Pow... by lightedman on Friday March 16, 2018 @11:53AM (#16601465)
Sure, you can reduce the voltage required, but what about the current required? Ferric materials tend to be somewhat resistive compared to most other metals.
Re:Chipmakers Test Ferroelectrics as a Route to Ultralow-Pow... by tedsanders on Friday March 16, 2018 @03:19PM (#16603267)
The ferroelectric materials here are used in the insulating stack, so actually higher DC resistance is a good thing.
Re:Chipmakers Test Ferroelectrics as a Route to Ultralow-Pow... by deepnotderp on Friday March 16, 2018 @04:10PM (#16603668)
The ferroelectrics here are used to create a negative capacitance, which, when in series with a positive capacitor, results in a voltage amplifier. This subverts the 60 mV/ decade Boltzmann limit.
Re:Chipmakers Test Ferroelectrics as a Route to Ultralow-Pow... by slededit on Friday March 16, 2018 @01:21PM (#16602231)
DDR4 on chip frequencies are on the order of 200mhz internally. They get the high data rates by being massively parallel. So never discount the low clock frequencies.
Re:Chipmakers Test Ferroelectrics as a Route to Ultralow-Pow... by deepnotderp on Friday March 16, 2018 @04:12PM (#16603677)
It's a moot point anyways since hafnia based ferroelectrics do not suffer from this speed issue. Also this is the transistor switching speed we're talking about, entirely different than DDR clock speeds.
Re:Chipmakers Test Ferroelectrics as a Route to Ultralow-Pow... by slededit on Friday March 16, 2018 @06:52PM (#16604539)
Transistor speed is actually the problem on DRAM memories. The process for making great capacitors is terrible for making fast transistors.
Re:Chipmakers Test Ferroelectrics as a Route to Ultralow-Pow... by deepnotderp on Friday March 16, 2018 @09:39PM (#16605159)
But DRAM processes use RCAT transistors.