FPGAs start from far, far behind on the performance end though (by a factor of several dozen). FPGA vendors compete to shift as much as they can out of configurable logic and into lithographically-defined IP blocks because of this severe disadvantage. A modern FPGA will be strewn with hardwired serial interfaces, memory controllers, CPU cores, and the like. Taking advantage of these is almost always a gigantic performance win, and that's assuming the functionality they provide is even possible in configurable logic (e.g. try implementing a 32Gbps serial port using only configurable 500MHz logic).

FPGAs don't trend towards openness and you have to get a 100x win from their flexibility to break even on performance.

I'm curious about what Intel will do now that they own Altera. Maybe they'll be able to push FPGA technology into mainstream CPUs.

Not sure about economics, but separate PCIe card with FPGA and it’s own storage is not that hard to build. Such setup could accelerate big data operations for sure.

You can audit the FPGA code but good luck auditing the bitstream and those tools are all closed. Even for a small FPGA this would be quite a task.