Re:Intel Confronts Potential ‘PR Nightmare’ With Reported Ch...
by yorick on Wednesday January 03, 2018 @01:43PM
(#16063748)
A patch is in the works for ARM chips as well (http://lists.infradead.org/pipermail/linux-arm-kernel/2017-N...), but I am not clear on whether it's enabled by default. It seems like a good idea to have this, independent of current ARM vulnerability.
Re:Intel Confronts Potential ‘PR Nightmare’ With Reported Ch...
by exabrial on Wednesday January 03, 2018 @01:42PM
(#16063728)
Yep, I'm still wondering how this affects ARM and if it can be corrected in microcode on that platform.
I'm also wondering if/hoping for a fix that involves increased memory usage instead of the speed.
Re:Intel Confronts Potential ‘PR Nightmare’ With Reported Ch...
by qubex on Wednesday January 03, 2018 @04:47PM
(#16065528)
I’m not a very proficient programmer/developer, so please bear with me. I’m intrigued by your reference to trading off greater memory footprint in exchange for diminishing performance by less. I'm trying to understand how this would work in practice: do you envision ‘padding’ the critical data structures with more empty or randomised buffer zones? Wouldn't that incur an additional penalty for the data transfer (Von Neumann bottleneck)? Would blank data be sufficient or would there be some additional kind of memory effect in the DRAM/SRAM that would demand using randomised data overwrites? How would you generate that random data?
(I apologise if this is blindingly obvious for somebody well versed in low-level programming.)
Re:Intel Confronts Potential ‘PR Nightmare’ With Reported Ch...
by exabrial on Wednesday January 03, 2018 @05:28PM
(#16065921)
Oh I have no idea actually; it's just pretty normal to see a speed-memory trade in a lot of problems. I'm definitely not low-level enough either.
Re:Intel Confronts Potential ‘PR Nightmare’ With Reported Ch...
by waz0wski on Thursday January 04, 2018 @12:51AM
(#16068344)
ARM posted a good overview and affected product list today:
Re:Intel Confronts Potential ‘PR Nightmare’ With Reported Ch...
by thraweigh666 on Wednesday January 03, 2018 @01:36PM
(#16063665)
>We need diversity and diversification in order to have reasonable amount of robustness
Ironically, in human populations it produces the opposite effect.
Re:Intel Confronts Potential ‘PR Nightmare’ With Reported Ch...
by dang on Wednesday January 03, 2018 @04:18PM
(#16065249)
Please don't take HN threads on ideological tangents. The point you're making has by now become well-known ideological flamebait. We ban users who derail HN threads in such directions, so please don't.
https://news.ycombinator.com/newsguidelines.html
Edit: since https://news.ycombinator.com/item?id=16063749 makes it clear that you're using HN for that purpose, which is not allowed here, I've banned this account. Would you please not create accounts to break the site guidelines with?
Re:Intel Confronts Potential ‘PR Nightmare’ With Reported Ch...
by adornedCupcake on Wednesday January 03, 2018 @01:38PM
(#16063686)
Why?
Re:Intel Confronts Potential ‘PR Nightmare’ With Reported Ch...
by edraferi on Wednesday January 03, 2018 @01:41PM
(#16063726)
More diverse population—> lower trust —> less social will to support each other.
Re:Intel Confronts Potential ‘PR Nightmare’ With Reported Ch...
by cryptonector on Wednesday January 03, 2018 @02:17PM
(#16064092)
So we should be tribal societies, then? (I.e., endogamous. As in cousin marriage.)
I’m wondering whether ARM chips are affected if they are whether they are uniformly affected or whether it depends on vendor implementation choices.