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Re:The Race to 10/7nm by BugsJustFindMe on Wednesday May 31, 2017 @02:25PM (#14454780)
This post is incredibly frustrating to read.

> "companies A, B, C, and D are producing w, x, y, and z nm transisters"

> "you have to ignore what nm they used, because actually w nm = x/2 nm"

> continues to use company-specific nm instead of comparable units

> reminds you again that the numbers are not comparable

> continues to use company-specific nm instead of comparable units

> “We’ve also packed them closer together to improve transistor density,” said Kaizad Mistry

Yes, that is what density means. Very good!

> "And forming the gate itself is also challenging. “Cycle times are increasing for this step, driven by the complexity of the stack,” said Mohith Verghese, director of global product marketing at ASM International. “The metal gate stack is also getting very complicated."

Oh, it's getting challenging, complex, AND complicated!

> There are several layers in the metal stack.

I think you just told me that a stack of something has several layers. Also that the metal gate stack is metal.

> And issues, such as... all add to increased cycle time.”

So cycle times are increasing because issues lead to increased cycle time?

...

gah. I want to finish this, but it's just so hard to read a pile, with several layers of course, of redundant PR snippets.

...

> performance become limited, mainly by the contact and back-end-of-line, because those become the bottleneck.”

FFFFFFUUUUU

Christ on a cracker, get an editor. Oh...you ARE the editor. <cries>

Re:The Race to 10/7nm by morei on Wednesday May 31, 2017 @05:19PM (#14456017)
In fairness, this is a horrifically complex subject. Pretty much every point you mention is a rabbit hole that you can spend ages exploring.

e.g. the metal stack: One would like to connect transistors together. Copper is lower resistance than doped silicon, so we'd prefer to use copper. But there's a catch: copper diffuses into silicon. That is, if you attempt to directly plate copper onto silicon, some of the copper diffuses into the silicon crystal mucking up all the careful doping of the silicon we just did.

So we put down a barrier layer first: We first coat the silicon with tantalum nitride which has significantly lower diffusion rates into silicon. And then we put copper on. No! Wait! We can't put copper directly onto tantalum nitride for <complex reasons this margin is too small to contain>. So we put tantalum metal onto the nitride,and then we put copper onto that metal.

This is the sort of thing that referred to as a metal stack. I've hand-waved like crazy here. The actual metal stacks are way more complex than this.

The article alludes to some of the recent challenges: The tantalum nitride barrier layer is too thick so there's a move to replacing it with a cobalt based stack, or maybe even a manganese/ruthenium based stack.

The author had a pretty tough job in trying to explain some of what's going on to a lay audience and (likely) do it inside a word limit. We can argue about successful it was on the margins, but personally I'm still very appreciative that they tried :)

Re:The Race to 10/7nm by BugsJustFindMe on Wednesday May 31, 2017 @05:37PM (#14456137)
> The author had a pretty tough job in trying to explain some of what's going on to a lay audience and (likely) do it inside a word limit.

The author would have had an easier time staying within a word limit if they didn't say the same thing multiple times in a row everywhere. Honestly, it looks like they had exactly the opposite problem of what you're suggesting and were trying to fill more space without understanding the subject. Much of the article is just parroting redundant PR soundbites.

Re:The Race to 10/7nm by Animats on Wednesday May 31, 2017 @03:56PM (#14455411)
It's a terrible article on an important subject.

He completely ignores the extreme ultraviolet "light source" problem. As the features get smaller, light wavelengths are too big, and higher frequency light has to be used to get the wavelength down. Current technologies use ultraviolet light. The next step down in size is "extreme ultraviolet", which is actually soft X-rays. The "light source" can be either a synchrotron or an an incredibly expensive kludge where droplets of tin are vaporized by lasers.[1] 30KW of laser power goes in to produce maybe 100 watts of useful illumination. Two floors, tons of equipment. All this just to expose a photosensitive resist on the wafer.

At 14nm, the UV light source is a modest device. Getting to 7nm is enormously more complicated. 7nm may not be cheaper per gate.

[1] https://www.youtube.com/watch?v=8xJEs3a-1QU

Re:The Race to 10/7nm by semi-extrinsic on Wednesday May 31, 2017 @03:29PM (#14455232)
There's lots of fun here!

> It will cost $271 million to design a 7nm chip, according to Gartner.

Not a million more, not a million less.

Re:The Race to 10/7nm by BugsJustFindMe on Wednesday May 31, 2017 @03:50PM (#14455370)
> As the size shrinks, less and less area and volume are available

Wait, are you sure?

Re:The Race to 10/7nm by wand3r on Wednesday May 31, 2017 @06:13PM (#14456354)
Unclear. Sometimes a smaller size like 7nm is actually 10nm. To summarize 10 > 7 BUT 7 = 10.
Re:The Race to 10/7nm by RugnirViking on Thursday June 01, 2017 @10:43AM (#14460651)
> Cost, of course, is key because only a select group of foundry customers with deep pockets can afford 10nm and 7nm

Really? I wouldn't have known that only people with more money can spend more money

Re:The Race to 10/7nm by vessenes on Wednesday May 31, 2017 @05:53PM (#14456231)
This is vastly overstated by the way. Maybe to design a de-novo X86 competitor chip. ARM's entire operating expenses in the last 12 months are about $700mm, for every single bit of their company. No way that a single 7nm chip costs $270mm for design.
Re:The Race to 10/7nm by pg314 on Thursday June 01, 2017 @03:14AM (#14458521)
Design is not the same as tape-out. ARM designs the logical structure of its chips (the VHDL or Verilog). They then license that design to customers (such as Apple, Samsung), who customise it.

The tape-out is completely separate from that. You need to do the physical layout and produce a set of lithographic masks that are incredibly expensive. Back in 2000, a set of masks for the most advanced technology at the time was already in the millions of dollars. Things have gotten ridiculously more complex since then.

Re:The Race to 10/7nm by wand3r on Wednesday May 31, 2017 @06:10PM (#14456327)
> Moore's law might be slowing, but the challenges are accelerating

Uh, ya. They are inversely correlated. The harder it is to do something the longer it takes.