Re:Why I will be using RISC-V in my next chip
by _yosefk on Saturday January 09, 2016 @05:13PM
(#10873106)
VLIW DSPs are in every phone. VLIW CPUs are almost certainly a bad idea and as to GPUs, AFAIK VLIW needs to coexist with barrel threading there which might create problems. But VLIW certainly has its place.
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Re:Why I will be using RISC-V in my next chip
by adapteva on Saturday January 09, 2016 @05:47PM
(#10873199)
Most DSP archs came out of thr 90's and many of the cores today are a reflection of that trend (ceva etc). I worked on the TigerSharc DSP for 8 years and can tell you that from an implementation standpoint they can be a nightmare! Not sure they do have a viable place long term from an economical perspective.
Re:Why I will be using RISC-V in my next chip
by creshal on Saturday January 09, 2016 @05:40PM
(#10873179)
In DSPs, sure, but not in general-purpose CPUs or GPUs.
Re:Why I will be using RISC-V in my next chip
by wsxcde on Sunday January 10, 2016 @01:07AM
(#10874416)
I suspect the DSP makers just use VLIW because of interia.
They probably don't have the money or incentive to revisit their old decisions.
Also wouldn't you say that most of the stuff that used to be implemented on DSPs is now moving into ASICs? I wouldn't be so sure that VLIWs are going to be around forever.
Re:Why I will be using RISC-V in my next chip
by sklogic on Sunday January 10, 2016 @02:30AM
(#10874571)
VLIW is many times cheaper (in terms of power and area) than OoO. It is not going anywhere from the low budget range.
Re:Why I will be using RISC-V in my next chip
by wsxcde on Sunday January 10, 2016 @12:53PM
(#10876232)
But VLIW and OoO aren't the only two design points. The renewed interest in traditional inorder vector processors. In any case, I do think the point of DSPs was to be area/power efficient for certain specialized algorithms, and a lot of these are just becoming ASICs/specialized accelerators today.