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A comment on Why I will be using RISC-V in my next chip. Parent comment

Re:Why I will be using RISC-V in my next chip by sklogic on Sunday January 10, 2016 @02:30AM (#10874571)
VLIW is many times cheaper (in terms of power and area) than OoO. It is not going anywhere from the low budget range.
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Re:Why I will be using RISC-V in my next chip by wsxcde on Sunday January 10, 2016 @12:53PM (#10876232)
But VLIW and OoO aren't the only two design points. The renewed interest in traditional inorder vector processors. In any case, I do think the point of DSPs was to be area/power efficient for certain specialized algorithms, and a lot of these are just becoming ASICs/specialized accelerators today.
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