Re:$30M Raised to Redo the CPU
by CyberDildonics on Thursday November 12, 2026 @08:20AM
(#50466706)
Im suggesting the cost/benefit of cpus that do not have any cache, no branch prediction, no out of order, just the minimum to execute its ISA.
Right, again this is clear. Although you did talk about cache earlier, it's not a mystery what you are trying to say. It's simple, easy and doesn't work.
Again cutting things down to as simple as possible and hope for the best.
These old CPUs are extremely efficient with transistor budgets but they do almost nothing.
It was dismissed because x86 has a very large impossibly expensive range of software that would be lost on any new different arch.
This is completely wrong. If this architecture worked, there would be a 100,000 original x86 cores on a chip. You can look at the evolution of x86, super scalar computers like cray machines, the successors to the 6502, chips from sun, dec, SGI etc. and see what they added and why.
There are new CPUs running riscv that you can buy right now and they don't do anything like this even though it is running on a completely new instruction set.
The 6510 could do floating point in software.
32 or 64 bit floating point numbers using just 8 bit integer add and subtract with bit shifts. Kind of seems like the thing that would be much better done in hardware. Maybe do 8 or 16 floating point operations in a single cycle.
one could add a simple FPU
The first FPU was 45,000 transistors. Now each chip isn't 3,500 transistors any more. Don't forget you are still moving single bytes around with every instruction, many instructions take more than one cycle to complete, you have almost no registers and the ones you have are all 8 bit and because you have no cache, every memory load takes hundreds of cycles while the cpu sits and does nothing.
Im just suggesting an arch without all the extras that require lots of transistors like Out of order execution, caches and all that.
Again, it's obvious that you are suggesting that and with a little research it's obvious why it doesn't work out.
Right, again this is clear. Although you did talk about cache earlier, it's not a mystery what you are trying to say. It's simple, easy and doesn't work.
Again cutting things down to as simple as possible and hope for the best.
These old CPUs are extremely efficient with transistor budgets but they do almost nothing.
It was dismissed because x86 has a very large impossibly expensive range of software that would be lost on any new different arch.
This is completely wrong. If this architecture worked, there would be a 100,000 original x86 cores on a chip. You can look at the evolution of x86, super scalar computers like cray machines, the successors to the 6502, chips from sun, dec, SGI etc. and see what they added and why.
There are new CPUs running riscv that you can buy right now and they don't do anything like this even though it is running on a completely new instruction set.
The 6510 could do floating point in software.
32 or 64 bit floating point numbers using just 8 bit integer add and subtract with bit shifts. Kind of seems like the thing that would be much better done in hardware. Maybe do 8 or 16 floating point operations in a single cycle.
one could add a simple FPU
The first FPU was 45,000 transistors. Now each chip isn't 3,500 transistors any more. Don't forget you are still moving single bytes around with every instruction, many instructions take more than one cycle to complete, you have almost no registers and the ones you have are all 8 bit and because you have no cache, every memory load takes hundreds of cycles while the cpu sits and does nothing.
Im just suggesting an arch without all the extras that require lots of transistors like Out of order execution, caches and all that.
Again, it's obvious that you are suggesting that and with a little research it's obvious why it doesn't work out.