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Re:RISC-V Is Sloooow by adgjlsfhk1 on Tuesday March 10, 2026 @06:10PM (#47329407)
the avoidance of patent/copyright is critical for (legally) having students design their own chips. MIPS was pretty good (and widely used) for teaching assembly, but pretty bad for teaching a class where students design chips
Re:RISC-V Is Sloooow by userbinator on Wednesday March 11, 2026 @12:10AM (#47331667)
MIPS patents have long expired too (and incidentally for any other CPU released prior to 2006), so that's a moot point.
Re:RISC-V Is Sloooow by musicale on Wednesday March 11, 2026 @12:14AM (#47331695)
This is largely disproven by the pre RISC-V, MIPS editions of Patterson & Hennessy and Harris & Harris, etc., which teach you how to design a MIPS datapath (at the gate level.)