A HDD has 1 controller chip and that controller is relatively simple compared to the controller chip on an SSD, its certainly a lot smaller and on a less advanced process because it has to deal with ~200MB/s not 15000MB/s. On top of the controller chip a 2280 NVMe SSD will have 4 or 8 memory chips as well, which are on a recent process and have many many layers stacked together. Then the SSD will also often have a DRAM chip as well. An SSD uses substantially more silicon than a HDD does.

Not disputing your broader point necessarily, but don't hard drives also include memory for cache while dram cache has become less and less common on SSDs? (to point where it is now uncommon on new SSD devices)

Yes they do. A consumer HDD from Seagate seems to have about 512MB whereas an SSD from Samsung seems to use 2GB.

HDDs use much simpler electronics than SSDs. The controller in a hard drive mostly just moves the read/write head and spins the motor. It doesn’t need to do much processing. These chips are built on older manufacturing processes that are cheaper and less energy intensive.

SSDs though need a fast processor to manage the flash memory for wear leveling, error correction, and keeping track of where everything is written etc. This requires more advanced chips, built on newer process nodes, which take a lot more energy and resources to make.

And SSDs also need extra chips like DRAM and obviously the flash memory itself.

DRAM is optional on NVME SSD's which can use host memory instead. DRAM-less SATA SSD's sucked.

HDD controller calculates and checks ECC either and en/decodes the user's 0/1-bits to the 0/1-bits actually to be written on the platter but at much smaller speed (0.3 GB/s vs 14 GB/s SSD max). HDD has an extra servo controller. HDD has an extra 512 MB - 1 GB DRAM.

WD HDDs 20 GB+ have some FLASH inside for metadata offload.

Is the controller really going to be that much simpler on a HDD? On HDD you still have things like command queuing, caching, checksumming and bad block remapping just as with SSD. Sure you don't have the flash translation layer, but I'd expect processing of the analog signal going to/from the heads to be a processing headache too. I wouldn't be surprised if they have to do temperature compensation and factory and/or runtime calibration of the analog path. Of course much of that will be done in fixed-function custom hardware blocks, but almost certainly so would a SSD for eg. ECC calculations.

https://spritesmods.com/?art=hddhack&page=3 has some data points on a 10+ year old HDD - 3 ARM9 feroceon cores + Cortex-M3 core. Doesn't sound too simple.