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Re:A 94x speed improvement demonstrated using handwritten as... by jsheard on Monday November 04, 2024 @09:15AM (#42041697)
Instrinsics more or less map to specific assembly instructions, but the instruction scheduling and register allocation is still handled by the compiler, which you have to do by hand in raw assembly. Possibly multiple times, since the optimal instruction scheduling is hardware specific. Intrinsics can also be automatically inlined, constant folded, etc, which you don't get with assembly.

Also Intel and ARM themselves specify the C intrinsics for their architectures so they're the same across MSVC, GCC and Clang, it's not like the wild west of other compiler extensions.

Re:A 94x speed improvement demonstrated using handwritten as... by flohofwoe on Monday November 04, 2024 @09:20AM (#42041734)
Hmm right, makes sense. I do wonder though if actually making use of the high level convenience then can harm performance again, e.g. let's say I'm building intrinsic parameters with regular C scalar expressions, or use if-else control flow between intrinsics. Convenient to do, but can't be great for performance versus fully simdified code.
Re:A 94x speed improvement demonstrated using handwritten as... by janwas on Monday November 04, 2024 @09:57AM (#42042080)
Sure, we generally don't want branches in the code.

What makes intrinsics really interesting is that you can use wrapper libraries such as our Highway, then the code actually is portable and efficient.

Re:A 94x speed improvement demonstrated using handwritten as... by astrange on Monday November 04, 2024 @03:46PM (#42045819)
Clang doesn't guarantee that; it runs everything through its optimizer, which means you can use an intrinsic and not get the instruction it's named after.

The other big general issue is memory aliasing. If you're working on 8-bit data then C says that means it aliases everything and it's going to deoptimize your other memory accesses. Conversely if you're freely switching types like SIMD tends to do, that's against the aliasing rules.