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A comment on iAPX432: Gordon Moore, Risk and Intel’s Super-CISC Failure. Parent comment

Re:iAPX432: Gordon Moore, Risk and Intel’s Super-CISC Failure by rep_lodsb on Monday April 03, 2023 @10:15AM (#35423943)
Bit-addressable data has been done in at least one other architecture: https://en.wikipedia.org/wiki/TMS34010

This is different from the 432 having opcodes that weren't a multiple of 8 bits, making decoding even more complicated than on x86.

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Re:iAPX432: Gordon Moore, Risk and Intel’s Super-CISC Failure by kjs3 on Monday April 03, 2023 @11:39AM (#35425616)
The Intel 8051 can do limited bit level addressing. It's restricted to a specific 16-byte region in low memory, which it makes it different than either the 432 or 34010.
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