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A comment on iAPX432: Gordon Moore, Risk and Intel’s Super-CISC Failure. Parent comment

Re:iAPX432: Gordon Moore, Risk and Intel’s Super-CISC Failure by astrange on Monday April 03, 2023 @01:20AM (#35418848)
Intel does have a pointer tagging feature called Linear Address Masking. Why it's called that I don't know.

(On ARM it's called TBI/top byte ignore, on AMD it's called UAI/upper address masking.)

This is different from pointer signing which it doesn't have.

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