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A comment on Ask HN: If the CPU redesigned today, with no legacy incentives what can change?. Parent comment

Re:Ask HN: If the CPU redesigned today, with no legacy incen... by t-3 on Friday March 03, 2023 @10:46AM (#35011098)
> having von-Neumann architecture instead of Harvard one.

I think you got that backwards. Von Neumann is mainstream and a few MCUs use Harvard architecture.

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Re:Ask HN: If the CPU redesigned today, with no legacy incen... by eimrine on Friday March 03, 2023 @11:03AM (#35011349)
So why a CPU cache (L1 L2 L3) has 2 halves, one for code and another for data?
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Re:Ask HN: If the CPU redesigned today, with no legacy incen... by t-3 on Friday March 03, 2023 @11:24AM (#35011623)
Can you directly choose what goes into the cache or is it just a technical optimization? Which instructions read and write the cache?
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Re:Ask HN: If the CPU redesigned today, with no legacy incen... by zerohp on Friday March 03, 2023 @11:52AM (#35012046)
You can directly choose what is available on the instruction side by using the XN (aka XD) permission bits in the page table. Other mechanisms exist to make pages readable by instruction fetch but not readable by the data side.

Von Neumann vs Harvard is a pointless discussion. Both are too simplistic describe modern architectures.

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