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A comment on Zen4's AVX512 Teardown. Parent comment

Re:Zen4's AVX512 Teardown by paulmd on Tuesday September 27, 2022 @12:29AM (#32991561)
No, actually grandparent is correct here - Skylake-X/Skylake-SP have never clocked down the first time they see an AVX-512 instruction. It actually is when the AVX instructions start to get dense enough to justify a voltage swing upwards. This actually exists in Haswell as well - certain AVX2 instructions are designated "heavy" and if you get enough of them you'll enter a voltage or frequency transition.

On Skylake-X there are more states... AVX-512 light and heavy as well.

https://travisdowns.github.io/blog/2020/01/17/avxfreq1.html#...

https://travisdowns.github.io/blog/2020/08/19/icl-avx512-fre...

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Re:Zen4's AVX512 Teardown by boundchecked on Tuesday September 27, 2022 @01:04AM (#32991713)
Skylake-X on X299 can be configured to not downclock at all, the light and heavy stages are referred in BIOS as AVX2- and AVX512-offsets, but of course that comes with extra heat and power draw. The voltage transition period can't be mitigated AFAIK.
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Re:Zen4's AVX512 Teardown by bayindirh on Tuesday September 27, 2022 @02:12AM (#32992013)
If I understood this correctly, this is for desktop chips and systems. My experience is solely based on Xeon family of processors.

Our systems doesn’t feature a similar override, but we can adjust the thermal and power envelope of the processors and system in general.

When we get a new bunch of systems, I’ll look into it, but my hopes are not that high.

Maybe we’ll get AMD systems this time, who knows.

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