No, actually grandparent is correct here - Skylake-X/Skylake-SP have never clocked down the first time they see an AVX-512 instruction. It actually is when the AVX instructions start to get dense enough to justify a voltage swing upwards. This actually exists in Haswell as well - certain AVX2 instructions are designated "heavy" and if you get enough of them you'll enter a voltage or frequency transition.
On Skylake-X there are more states... AVX-512 light and heavy as well.
https://travisdowns.github.io/blog/2020/01/17/avxfreq1.html#...
https://travisdowns.github.io/blog/2020/08/19/icl-avx512-fre...
Re:Zen4's AVX512 Teardown
by boundchecked on Tuesday September 27, 2022 @01:04AM
(#32991713)
Skylake-X on X299 can be configured to not downclock at all, the light and heavy stages are referred in BIOS as AVX2- and AVX512-offsets, but of course that comes with extra heat and power draw. The voltage transition period can't be mitigated AFAIK.
If I understood this correctly, this is for desktop chips and systems. My experience is solely based on Xeon family of processors.
Our systems doesn’t feature a similar override, but we can adjust the thermal and power envelope of the processors and system in general.
When we get a new bunch of systems, I’ll look into it, but my hopes are not that high.
Maybe we’ll get AMD systems this time, who knows.
Whatever control mechanism is used in the AMD Zen CPUs is better than Intel's, so they downclock only when the power consumption really increases and the clock frequency recovers when the power consumption decreases, so there is no penalty when using sporadically some 512-bit instructions, like in the Intel CPUs.