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Re:MIPS provides highly scalable RISC processor IP by yjftsjthsd-h on Wednesday April 06, 2022 @03:07PM (#30936232)
I know this is a kind of stupid little thing, but I really wish they'd rebranded more completely if they were going to do this. "That box has a MIPS processor in it. But not a MIPS processor, a MIPS RISC-V processor." We're going to end up with OSs list on their "supported platforms" page things like MIPS, MIPS64, MIPS-brand RISC-V.
Re:MIPS provides highly scalable RISC processor IP by dkersten on Wednesday April 06, 2022 @05:08PM (#30937443)
Its not really a "stupid little thing", it sounds like a big cause of confusion.
Re:MIPS provides highly scalable RISC processor IP by jogu on Wednesday April 06, 2022 @06:52PM (#30938451)
To be fair this isn't an announcement of a product or anything like that, so their line of RISC-V processors could have distinct branding e.g. FooBar RISC-V Processors (by MIPS).

Totally agree though that they should probably be careful and put some thought into how they brand these.

Re:MIPS provides highly scalable RISC processor IP by gpderetta on Thursday April 07, 2022 @07:09AM (#30942975)
RISC-V itself is a very confusing branding. "Not a MIPS RISC processor, a MIPS RISC-V processor!"
Re:MIPS provides highly scalable RISC processor IP by HideousKojima on Wednesday April 06, 2022 @11:06PM (#30940196)
ARM has been doing basically the same thing for decades now with all the different sub versions of ARMv7, 8, 9 etc.
Re:MIPS provides highly scalable RISC processor IP by yjftsjthsd-h on Thursday April 07, 2022 @12:25AM (#30940597)
Those are versions of the same(ish) ISA and are (usually?) backwards compatible. I'd mind less if MIPS-the-company made CPUs that were RISC-V with a MIPS-the-ISA compatibility mode, or otherwise actually had continuity; it's the apparent plan to throw away the ISA but keep the name that's jarring.
Re:MIPS provides highly scalable RISC processor IP by dragontamer on Thursday April 07, 2022 @12:58AM (#30940761)
ARM Cortex M0+ looks nothing like ARM v8.

ARM Cortex M0+ has more similarities with the ATTiny84 / Arduino chips than with cellphone-sized ARMs.

Re:MIPS provides highly scalable RISC processor IP by pajko on Thursday April 07, 2022 @11:47AM (#30946110)
Cortex M0+ is ARMv6-M. ARMv8 has also an M variant, Cortex M33 is ARMv8-M mainline. ARMv6-M and ARMv8-M have quite a lot of things in common, as v8 is a superset of v6. Or did you mean ARMv8-A? Well, ARMv8-A and ARMv8-M are not compatible intentionally, as the the A variant is strictly 64-bit (some implementations support AArch32 though) and the support for thumb instruction set has been dropped.
Re:MIPS provides highly scalable RISC processor IP by GoblinSlayer on Thursday April 07, 2022 @04:47AM (#30942141)
That's reasonable: RISC-V is mostly a cleaned up MIPS, so can definitely go as a MIPS family ISA.
Re:MIPS provides highly scalable RISC processor IP by pajko on Thursday April 07, 2022 @11:35AM (#30945884)
MIPS is as cleaned up as needs to be. RISC-V removed important features and adds loads of bloats via extensions.