XiangShan open-source 64-bit RISC-V processor to rival Arm Cortex-A76

Re:XiangShan open-source 64-bit RISC-V processor to rival Ar... by rjsw on Monday July 05, 2021 @02:57PM (#27740860)

Whether RISC-V ISA extensions are allowed or not is unrelated to the problems seen with ARM SoCs putting peripheral devices at different addresses.

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Re:XiangShan open-source 64-bit RISC-V processor to rival Ar... by a9h74j on Monday July 05, 2021 @03:35PM (#27741169)

Could a device table [for on-chip peripherals] be put right on chip?

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Re:XiangShan open-source 64-bit RISC-V processor to rival Ar... by formerly_proven on Monday July 05, 2021 @03:56PM (#27741314)

Yes, that's a devicetree. Those can be tacked onto the kernel image or dynamically loaded from the chip's firmware (which most likely gets it from the firmware flash).

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