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Re:Silice: A language for hardcoding Algorithms into FPGA ha... by anon_tor_12345 on Tuesday June 22, 2021 @02:15PM (#27595131)
actually this is exactly what i was talking about i.e. (as far as i understand it) this is essentially a reduction tree. i called it a recursive hardware design because it synthesizes to indeed i was unaware that you recursively call functions in vhdl. thanks!

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