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A comment on Alternate Instruction Set. Parent comment

Re:Alternate Instruction Set by blueflow on Monday May 31, 2021 @05:10PM (#27348040)
This is documented on Page A-10 of that processor datasheet: http://datasheets.chipdb.org/VIA/Nehemiah/VIA%20C3%20Nehemia...
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Re:Alternate Instruction Set by trasz on Monday May 31, 2021 @06:41PM (#27348880)
Which states that while the ALTINST instruction is not privileged, it depends on a certain bit in an MSR which needs to be enabled first, and that's privileged.
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