Alternate Instruction Set

Re:Alternate Instruction Set by geofft on Monday May 31, 2021 @04:29PM (#27347779)

It seems to me the article is missing one very big piece of information that's mentioned by the linked security research: memory reads/writes in the alternate instruction set are not confined by x86 access protections, but ALTINST can be run by unprivileged code. Is that true? Should the article state it more clearly?

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Re:Alternate Instruction Set by blueflow on Monday May 31, 2021 @05:10PM (#27348040)

This is documented on Page A-10 of that processor datasheet: http://datasheets.chipdb.org/VIA/Nehemiah/VIA%20C3%20Nehemia...

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Re:Alternate Instruction Set by trasz on Monday May 31, 2021 @06:41PM (#27348880)

Which states that while the ALTINST instruction is not privileged, it depends on a certain bit in an MSR which needs to be enabled first, and that's privileged.

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Re:Alternate Instruction Set by detaro on Monday May 31, 2021 @04:33PM (#27347809)

Is "ring 0 but confined by access protections" a thing?

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Re:Alternate Instruction Set by geofft on Monday May 31, 2021 @04:39PM (#27347855)

Yes: https://en.wikipedia.org/wiki/Supervisor_Mode_Access_Prevent...

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