New x86 micro-op vulnerability breaks all known Spectre defenses

Re:New x86 micro-op vulnerability breaks all known Spectre d... by tux3 on Friday April 30, 2021 @08:19PM (#27001440)

ARM vendors must be feeling pretty good about themselves yeah, but if you take AMD's cores... SMT might not be a huge win in every benchmark, but you just can't keep that wide backend fed from a single hyperthread (at least I can't!).

So turning SMT off is at the least wasted potential for those cores, the way they've been designed

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Re:New x86 micro-op vulnerability breaks all known Spectre d... by wmf on Friday April 30, 2021 @09:36PM (#27002015)

Apple Firestorm is even wider but it doesn't have SMT. I guess they just don't care.

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Re:New x86 micro-op vulnerability breaks all known Spectre d... by marcan_42 on Friday April 30, 2021 @10:00PM (#27002193)

Probably because they have an 8-wide decoder and a massive reorder buffer, so they can actually keep the backend fed.

The problem with x86 is decoding is hell and requires increasingly large transistor counts to parallelize, so you end up with a bottleneck there. ARM doesn't have that problem.

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Re:New x86 micro-op vulnerability breaks all known Spectre d... by sitkack on Saturday May 01, 2021 @12:15PM (#27007455)

This the single largest driver of M1 performance.

Variable length, over lapping instructions has made x86 instruction decoding intractable. The obvious answer is make it tractable, the unobvious answer is how to do that and hopefully remain backward compatible.

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