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A comment on SiFive Tapes Out First 5nm TSMC 32-bit RISC-V Chip with 7.2 Gbps HBM3. Parent comment

Re:SiFive Tapes Out First 5nm TSMC 32-bit RISC-V Chip with 7... by brucehoult on Saturday April 17, 2021 @07:40PM (#26848419)
The only difference between a shuttle run and mass production is whether your chip is repeated 100 times in different parts of the wafer (surrounded by other people's chips) or a few thousand times completely covering the wafer with copies of just your chip.

The manufacturing process is identical either way.

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