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A comment on SK hynix begins offering samples of 176-layer NAND chip (2020). Parent comment

Re:SK hynix begins offering samples of 176-layer NAND chip (... by formerly_proven on Wednesday February 03, 2021 @07:06AM (#26012871)
That's what SLC write caching is.
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Re:SK hynix begins offering samples of 176-layer NAND chip (... by londons_explore on Wednesday February 03, 2021 @07:49AM (#26013159)
But my understanding is that uses a totally different chip... Which means the controller can't dynamically reallocate memory cells between QLC and SLC - you have a fixed amount of each.
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Re:SK hynix begins offering samples of 176-layer NAND chip (... by formerly_proven on Wednesday February 03, 2021 @08:19AM (#26013328)
The SLC cache is always an area of MLC/TLC used as SLC, whether the split is hardcoded or dynamic depends on the exact model. Newer models tend to be dynamic.
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