Re:Memory access on the Apple M1 processor
by FabHK on Wednesday January 06, 2021 @06:00PM
(#25663901)
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Re:Memory access on the Apple M1 processor
by astrange on Wednesday January 06, 2021 @09:23PM
(#25666500)
It's spelled "-march=native" in gcc and "-arch x86_64h" in clang.
It doesn't make much difference though, autovectorization doesn't work very well and there is not a lot of special optimization for newer x86 CPUs.
Re:Memory access on the Apple M1 processor
by namibj on Thursday January 07, 2021 @10:05PM
(#25681042)
All recent Intel Core-i microarchitectures require using full vector width loads to max out L1d bandwidth, because the load/store units don't actually care about the width of a load, as long as it doesn't cross a cache line (in which case the typical penalty is an additional cycle).
Only using 128 bit wide instructions on a core that has 512 bit hardware results in 4x less L1d bandwidth.