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Re:The Heart of RISC-V Development Is Unmatched by bipson on Thursday October 29, 2020 @04:23PM (#24935291)
I know, this discussion is quite old (e.g. Mac vs. PC), but can you clarify how you define PC in your post?

Particularly what makes this RISC-V board a PC, what an RPi does not have? Form factor, ATX power or PCI-Express?

Re:The Heart of RISC-V Development Is Unmatched by justaguy88 on Thursday October 29, 2020 @04:30PM (#24935378)
This isn't a Mac vs PC comparison, its embedded form factor and vs standard form factor with standard connectors
Re:The Heart of RISC-V Development Is Unmatched by bipson on Thursday October 29, 2020 @04:35PM (#24935451)
I didn't say it was.

I was just wondering how you define PC. Form factor or "standard connectors" (whatever that is - which RPi connector is not "standard"?) are none of my criteria.

Re:The Heart of RISC-V Development Is Unmatched by brucehoult on Thursday October 29, 2020 @09:52PM (#24938269)
"PC": ability to use any commodity Mini-ITX PC case, commodity power supply, standard PCie video card, standard M.2 SSD.
Re:The Heart of RISC-V Development Is Unmatched by bipson on Friday October 30, 2020 @06:18AM (#24940800)
I'm getting frustrated here. Could you guys stop for a second pretending that your "opponent" is dumb and try to look outside the box?

Again, to me this are entirely arbitrary criteria. They are not "PC-Standards", they are some of many standardized connectors, form factors, etc. and in fact a matter of habit, not defining criteria.

Let me put it differently:

- So is a DTX-Board with an ARM-SoC a PC?

- Is an ATX-Board with a PowerPC but without PCIe a PC? What if we add PCIe?

- Is a SBC with an AMD APU powered by an USB power supply a PC? What if we add an M.2 port?

See where I am going? These are terrible criteria.

Define PC for me.

Re:The Heart of RISC-V Development Is Unmatched by ido on Friday October 30, 2020 @08:23AM (#24941468)
I don't think they pretend you are dumb.

As someone who is relatively a lay-person (as in - I know computers but I'm not a hardware person) I understand the difference as "can I buy some standard components off of amazon/ebay and lego-build a computer with fairly powerful components like geforce/radeon type GPUs and m.2 storage" or is something that's basically a sealed box/board (aside from more advanced stuff I won't do, like soldering chips to a PCB) and/or doesn't have access to desktop class components (as far as I'm aware you can't reasonably stick a desktop GPU on an rpi).

Re:The Heart of RISC-V Development Is Unmatched by teddyh on Friday October 30, 2020 @09:00AM (#24941735)
“Able to use all off-the shelf components, all of which have several competing manufacturers.”
Re:The Heart of RISC-V Development Is Unmatched by tmzt on Friday October 30, 2020 @08:40AM (#24941595)
The entire ecosystem surrounding modern descendents of the IBM PC compatible.

Normally this would also imply an Intel isa, which dictated a multi-component chipset. (North bridge/South bridge) this in turn implies an multi-voltage power supply with a standard plug or plugs derived from the one in the PC AT.

The PC ecosystem also features a set of peripherals, such as floppy drives, hard drives, and CD-ROM drives. These peripherals have their own busses, starting with MFM, and now IDE and SATA. In some cases SCSI entered into the mix, but most consumer-oriented PCs did not use it. These drives were also were powered by the same power supply as the rest of the PC, with an evolving set of connectors and electrical standards.

The Mac took a parallel course, but featured it's own set of proprietary connectors and buses, as well as SCSI, for years before converging with the PC ecosystem in part in later years.

Many of these de-facto and cloned standards were adopted by standards organizations, such as EIA/TIA and IEEE. They were joined by PCI buses, which were used in a diverse set of architectures, including Sun. Later serial variants were developed for the PC and Mac ecosystems, driven by demand for faster graphics accelerators, with a side jaunt to AGP.

At the same time, emdedded devices evolved around a simpler usually single-chip chipset, and often single voltage board designs, with the exception of the cpu core voltage in some cases. These largely used memory-mapped IO with periphrial chips coupled to the memory bus, as well as slower buses such as I2C and SPI. These devices were usually power constrained, having quickly moved into the mobile realm with early PDAs such as the Newton. They mostly developed around the ARM chip which so low power in the early versions that it could run without voltage on it's primary bus.

As the PC ecosystem has evolved, it is now largely built around the PCI bus. PCI is cpu agnostic, so the CPU can be replaced with a different isa while keeping the rest of the system intact.

The PC is also historically modular, so substitutions such as those you suggested can generally be made while keeung the PC nature of the system. M.2 is a modern bus that has veen adopted into the ecosystem primarily for laptops, though also featured in some desktops.

Modern emedded devices are begininning to feature PCI interfaces, though these are only recently appearing in consumer electronics. They have been used in storage-centric chipsets for much longer.

The PC also implies a modular memory bus, with chips or modules complying with a logical and electrical standard, and identifying chip that can be probed by the chipset. In some cases the modularity is reduced and the chips are soldered to the mainboard.

PCs have also begun to adopt single-chip chipsets and System-on-Chip designs, starting with some emdedded intel designs used in mobile tablets and the UMPC. These brought the classic north bridge and south bridge as well as graphics (in this case PowerVR coming from the emdedded world). AMD64 chips also began to include the memory controller on die, leading up to the mentioned APUs that can be powered with the help of a standard embedded power IC from a single low voltage source.

Re:The Heart of RISC-V Development Is Unmatched by bipson on Friday October 30, 2020 @09:06AM (#24941779)
Great explanation.

Which also implies that the mentioned "criteria" are not good, since it is not a clear cut case. It is not binary, I cannot definitely say when something "starts or stops being PC" or where "non-PC" begins, there is a huge grey area nowadays.

It is as such a very meaningless classification.

Re:The Heart of RISC-V Development Is Unmatched by giantrobot on Thursday October 29, 2020 @04:47PM (#24935603)
The main thing I think would be simply enumerable buses and support for the APCI root bus instead of the more embedded focused device tree.
Re:The Heart of RISC-V Development Is Unmatched by monocasa on Thursday October 29, 2020 @06:39PM (#24936955)
Device tree doesn't really have an embedded focus per se. It comes from Sparc and PowerPC workstations.

And ACPI doesn't really have a standard root bus, it's a soup of descriptor tables and virtual machine blobs you have to run and trust, along with veritable mountains of patches for those vm bytecodes to fix firmware issues.

IMO Device Tree is the right way to go for nearly all platforms.

Re:The Heart of RISC-V Development Is Unmatched by AnthonyMouse on Thursday October 29, 2020 @07:41PM (#24937428)
I'm going to try to describe something I only half understand in the hopes that someone who does fully understand it will come by and provide a better description.

For normal PC hardware, you have a SATA controller, the device company commits a driver for it to the Linux kernel tree, and thereafter every subsequent version of Linux can use the SATA controller in any device with that kind of SATA controller. If the device company doesn't provide a driver but the hardware is popular, somebody else reverse engineers the chip and eventually the same result obtains. Likewise for the network controller, the GPU and so on.

Typical ARM devices like cellphones are beleaguered by some kind of shameful omnishambles whereby that doesn't work. The device maker provides a hideous binary blob with the device, it only works with that specific kernel version and everything is terrible. The exact source of the tragedy is the part I'm not quite clear on.

But making whatever that is not apply to RISC-V boards would be highly satisfactory.

Re:The Heart of RISC-V Development Is Unmatched by pm215 on Friday October 30, 2020 @05:04AM (#24940419)
My take is that this is the effect of the requirements of the companies producing hardware and is entirely unrelated to the CPU architecture. On desktop and server consumers have a very strong demand that off-the-shelf OSes Just Work (so they can install stock RedHat or Windows) and so there is pressure on hw manufacturers to create and follow standards. Breaking away from the consensus standards is penalized, not rewarded. You can see this happening as Arm moved into the server space, too -- server Arm is much less heterogenous than embedded Arm. Conversely, in embedded devices there is little or no pressure to standardize, because often the system software will be a custom build for that device anyway, and end-users aren't expected to try to install a new OS on it. In this world, differences in hardware tend to be rewarded rather than penalized -- the funky nonstandard feature in your SoC may be what persuades the h/w designer to pick you rather than a competitor, implementing something in a weird way can shave a bit off power consumption or just save time in the design process, and so on. And because there's no requirement to have the end user install a new OS the temptation to save time in development by not trying to upstream kernel changes is often overwhelming.

The difficulty with 'dev boards' like the RPi is that for economic reasons they're made with SoCs from the high-volume markets of the embedded world but sold to people who want to use them like the standardized hw of the server world. This mismatch tends to be annoying and inconvenient.

Anyway, my take is that for RISC-V the dynamics will be exactly the same -- in the embedded world there will be a profusion of different hardware and a lot of binary blobs and non-upstreamed drivers; in the server world things will be nicer; and dev boards will be more like the embedded world than you would like.

(Also, x86 is really unusual in having such a uniform every-machine-looks-the-same ecosystem; this has happened by historical accident as much as anything else. Of course most people only have experience with x86, but it might help to try to not think of absolute-x86-monoculture as 'normal' and wider-variety as 'weird', when it's the other way around :-))

Re:The Heart of RISC-V Development Is Unmatched by monocasa on Thursday October 29, 2020 @07:57PM (#24937553)
It "doesn't work" on ARM simply do to the extreme heterogenity. To ask for otherwise would be asking for AMD drivers to work for an Nvidia graphics card.

Additionally, PCs do in fact of tons of glue and support systems that match how ARM style SoCs work. They paper over it with ACPI which is based around a VM that has to be run in the kernel that's basically a giant binary blob, in contrast to device tree's description of the components and how they're connected.

Re:The Heart of RISC-V Development Is Unmatched by AnthonyMouse on Thursday October 29, 2020 @08:35PM (#24937840)
> It "doesn't work" on ARM simply do to the extreme heterogenity. To ask for otherwise would be asking for AMD drivers to work for an Nvidia graphics card.

If what you're saying is that on ARM there are 15,000 different kinds of USB controller that all need their own driver, that's one thing. But if all you're saying is that there are 25 different USB controllers and 25 different drive controllers and 25 different network controllers and that means you get 15,000 different possible combinations, the fact that every combination needs its own separate drivers is the bug. Even if various controllers are combined into one SoC.

> They paper over it with ACPI which is based around a VM that has to be run in the kernel that's basically a giant binary blob, in contrast to device tree's description of the components and how they're connected.

It seems to be doing a useful thing in abstracting away the various binary blobs into a stable interface that allows them to continue operating with newer kernel versions.

Getting rid of the binary blobs entirely is a separate fight, presumably related to getting open source firmware (rather than drivers).

Re:The Heart of RISC-V Development Is Unmatched by numpad0 on Friday October 30, 2020 @04:02AM (#24940077)
It’s not the matter of combinatorial explosion or binary blobs...

On many non-PC platforms, you’re given a thousand “pins” to which you’re free to connect whatever circuit that you conceived for your product, be it green and red buttons, or backlight control circuits, or temperature sensing inputs, or SATA controllers, or 4 bit 74 series counter repurposed to switch pin 567 between SATA controller configuration interface output and battery temperature gauge input and laser ranging sensor power modulation output and self destruction device detonation cord output.

There’s no way or even motivation to describe those board specific miscellanies in such way that Linux Kernel drivers can dynamically consume and adapt to, or decide how to behave.

This is not an issue for x86 PC platform, because every x86/x64 PC is either a 100% clone of IBM 5170 “PC/AT” to run IBM DOS 5.0 or Microsoft MS-DOS 5.0 binary without ever catching fire, or a Microsoft Windows Logo Program certified product that boots into Windows of the same era from binary installer disc/USB key.

Re:The Heart of RISC-V Development Is Unmatched by AnthonyMouse on Friday October 30, 2020 @09:31PM (#24948391)
> There’s no way or even motivation to describe those board specific miscellanies in such way that Linux Kernel drivers can dynamically consume and adapt to, or decide how to behave.

It doesn't seem like an intractable problem to standardize and document this sort of thing. Once you know that pin 45 is connected to a model ABC123 backlight controller, you know to communicate with it on pin 45 using the ABC123 backlight controller driver. If the same pin is used for multiple outputs, no problem, standardize the method for switching between outputs and describe which pins are switched to which devices using which control pins in a machine-readable table.

Apparently they haven't done this, so how do we get them to start?

Re:The Heart of RISC-V Development Is Unmatched by monocasa on Friday October 30, 2020 @10:26PM (#24948670)
They have done this; you're describing device tree.

It's not a combinatorial problem, but just pure number of different devices.

Re:The Heart of RISC-V Development Is Unmatched by m463 on Thursday October 29, 2020 @04:54PM (#24935720)
Use a standard power supply, put it in a case and maybe develop on it. and pci-express opens up possibilities the pi (not compute) doesn't really have access to.

I have many pis that I love, but you have to admit, there are a few compromises made for a lower bom cost. That is not a requirement for a $600+ board.

Re:The Heart of RISC-V Development Is Unmatched by freeopinion on Thursday October 29, 2020 @06:02PM (#24936620)
Pi uses a standard power supply.

You can put a Pi in a case. In fact, it's hard to find one on Amazon without a case.

Of course you can develop on it. That's the whole point.

Pi 4 has pci-express, no?

Re:The Heart of RISC-V Development Is Unmatched by m463 on Thursday October 29, 2020 @08:18PM (#24937724)
I struggled with a power supply for the pi all the way up to the pi 4 - always getting the low power indicator.

I struggled with the pi SD card - extremely slow and always the possibility of corruption.

I struggled with pi graphics - none of my projects every had accelerated graphics, not even blits.

I struggled with pi USB - at first it was power and speed, now it might be in better shape but not all the way there. The pi is still limited to ~ 15w.

When you get to the pc ecosystem, and it's really just a bit more expensive, you get a step up in capabilities. You get all the voltages. You can get a 300w or a 1500w power supply.

You can add a graphics card.

You can put it in a case that has room for more than just the board. Say, I/O?

I wish the pi had a nice metal case that had a 2x the width allowing for an enclosed breadboard or the like. Or a case with all the connectors on one side.

> Pi 4 has pci-express, no?

really? where is the slot? (I said not compute) ;)

btw, I'm not anti-pi, the opposite in fact.

Maybe I could say it in another way -- what if you could have an itx form-factor pi? I think that would be very exciting.

Re:The Heart of RISC-V Development Is Unmatched by CrazyPyroLinux on Thursday October 29, 2020 @10:57PM (#24938659)
> Pi 4 has pci-express, no?

Not the pi, but the vaguely-similar (better, IMHO) https://www.pine64.org/rockpro64/ has a 4x pcie. Works great for a sata/raid controller, but still has plenty of "embedded" limitations - you can't just plug a graphics card into it.

Re:The Heart of RISC-V Development Is Unmatched by tmzt on Friday October 30, 2020 @08:57AM (#24941713)
What's preventing you from using an AMD graphics card, assuming it could be fully inited via modesetting DRM and AGESA?
Re:The Heart of RISC-V Development Is Unmatched by CrazyPyroLinux on Friday October 30, 2020 @10:34AM (#24942629)
Hmm I always assumed that there were missing/unsolved pieces of the driver that would need to be fixed first, based on the way that support for these devices seems to need to be solved one by one [0] but it looks like at least someone has made progress on a different board [1]

[0] ayufan https://docs.google.com/spreadsheets/d/1pCqJg0VSzvihUOoxCOq3...

[1] https://www.reddit.com/r/arm/comments/9v8qpm/do_amd_or_nvidi...

Re:The Heart of RISC-V Development Is Unmatched by detaro on Saturday October 31, 2020 @02:05PM (#24953737)
Last I saw the chipset can't map enough memory space to PCIe for GPUs to work, but this might be possible to change with a firmware update.