> In the table on the page, why does "Foundry sale price per chip" decrease, while "Foundry sale price per wafer" increase

I had the same question. Seems it's based on an earlier table in the same PDF (see my top-level comment for source link), namely Table 7 on page 41, which lists transistor density to calculate average chips per wafer.

And then, for the table referenced in the article (which is Table 9 in the PDF), it says: "In line 8, we convert the per wafer value to a per chip value by dividing by the number of chips per wafer of a given year’s node listed in Table 7."

I assume as transistor density increases, you get more chips per wafer.

AMD style chiplets also increase yield.

Line 8 of Table 9 is misleading out of context. If you dig into the report itself, it's calculated based on a hypothetical chip with the same number of transistors for each process (Table 7). For example, the 90nm process is listed as yielding "0.7" chips per wafer, which is obviously nonsensical. Line 8 would be more appropriately described as "cost per 90.7 billion transistors", if I am reading the report right.

Area, intrinsic process cost, and also TSMC is a monopoly at the leading-edge node. They can charge what they wish.

Isn’t it normalized to a 610nm die on all processes?

That only explains costs not prices