NAND Flash is just a type of EEPROM.

Early EEPROM could only be wiped entirely (but as this was done electrically, it was still an improvement over UV-erased EPROM), while EEPROM at the time of Flash's creation could often be byte-erased (as is the case now).

Nowadays "EEPROM" mostly refers to small, slow, rarely written config storage for microcontrollers. As thus, they are also usually accompanied by low write/erase endurance despite their byte-erase granularity.

Flash was meant as a higher capacity/performance version indeed sporting full block erasure as a downside, but nowadays it has supplanted EEPROM in all categories but small micro-controller usages. Plus, as capacity is now cheap, high write loads can easily be supported with write levelling (that is, writing to new locations instead of erasing/writing the same block over an over.)

The problem is that eeproms don't do wear leveling. Not internally and they're usually controlled by a simpler microcontroller that doesn't have enough resources to do it in software.

So every time you write to three same byte you're writing the same cell. 100.000 cycles is actually much more than current flash generations.

These days basically every kind of mass storage device you will use has its own dedicated controller chip which is pretty much a cpu with its own RTOS now. Those 2 cent 8kb eeprom ICs don't but its crazy how complex something like an sd card is.

Some of those SD cards run linux! https://hackaday.com/2016/06/30/transcend-wifi-sd-card-is-a-...