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Re:Constant Time LFU by fluffy87 on Thursday August 27, 2020 @07:46PM (#24299971)
Is there a way to make these data structures hardware friendly? So that SIMD instructions can be used, memory is traversed continuously, without multiple pointer indirections, etc?

Are there any blogposts about this?

Re:Constant Time LFU by jasonwatkinspdx on Thursday August 27, 2020 @09:17PM (#24300449)
For chaining hash tables like this you can use a linked list of buckets where each bucket allows multiple entries, and entries can be scanned with SIMD operations. The downside is it considerably complicates the insertion/update logic, so depending on the workload it may be a net performance loss. If the hash table is designed for concurrency the extra complexity can very likely lead to tricky to understand bugs or performance cliffs.
Re:Constant Time LFU by T0pH4t on Thursday August 27, 2020 @07:53PM (#24300009)
You can do this at the hashtable level when comparing keys. I think TBB does it. https://software.intel.com/en-us/node/506171
Re:Constant Time LFU by jleahy on Friday August 28, 2020 @04:30AM (#24302610)
There are many ways, and they look nothing like this of course.

For a hint, have a look at how a CPU implements the LRU cache (eg. L1, L2). It’s not rocket science.