The DooM-chip: no CPU, no opcodes, no instruction counter

Re:The DooM-chip: no CPU, no opcodes, no instruction counter by WatchDog on Saturday May 09, 2020 @10:46AM (#23125107)

The future sure sounds a lot like the past, given that everything, even toasters have CPU's in them these days.

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Re:The DooM-chip: no CPU, no opcodes, no instruction counter by corysama on Saturday May 09, 2020 @12:08PM (#23125927)

http://www.cap-lore.com/Hardware/Wheel.html

We’re currently rolling around back to a new era of lots of specialized chips.

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Re:The DooM-chip: no CPU, no opcodes, no instruction counter by daxfohl on Saturday May 09, 2020 @12:42PM (#23126189)

IDK, even in operations the size of the cloud providers, executing some of the same things billions of times a second, there's still very few specialized chips. TPU is an example, and I think they all use some for network packet filtering and such. But you don't see anything for DB acceleration or paxos acceleration or maps acceleration or anything like that. They've had years to figure this out, so if they're not finding it worth it at hypercompetitive cloud scale then I don't see the revolution going too awful far anytime soon.

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Re:The DooM-chip: no CPU, no opcodes, no instruction counter by monocasa on Saturday May 09, 2020 @01:46PM (#23126758)

Alibaba has been pushing the envelope pretty heavily in this area. I've heard of them using their FPGA instance for memcachedb instances, and video transcoding instances.

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Re:The DooM-chip: no CPU, no opcodes, no instruction counter by duskwuff on Saturday May 09, 2020 @05:03PM (#23128297)

Toasters are moving back to ASICs too:

https://www.diodes.com/assets/Datasheets/PT8A2514A.pdf

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Re:The DooM-chip: no CPU, no opcodes, no instruction counter by DonHopkins on Saturday May 09, 2020 @07:17PM (#23129028)

You could make toasters by recycling used MacBook Pros!

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Re:The DooM-chip: no CPU, no opcodes, no instruction counter by stjohnswarts on Saturday May 09, 2020 @06:27PM (#23128777)

lol meanwhile my 20 year old off brand toaster continues to toast just fine with 0 chips. As does my 10 year old dial based toaster oven

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Re:The DooM-chip: no CPU, no opcodes, no instruction counter by castratikron on Saturday May 09, 2020 @10:54AM (#23125153)

There are Super Nintendo games like Star Fox that had a second accelerator chip on board. But it would still be cool for the game to be the computer and exist in custom silicon. Development would be super slow of course but the result would literally be the best it could be.

Wonder if the advantage would be worth it. Is anyone trying?

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Re:The DooM-chip: no CPU, no opcodes, no instruction counter by moring on Saturday May 09, 2020 @01:18PM (#23126530)

I read somewhere that the chip used in Star Fox (SuperFX) is less an "accelerator" but rather "becomes" the main chip because it hogs the main bus, so the SNES's own CPU can't really do a lot. OTOH the SuperFX is not really a "game in silicon" but just a better CPU that has built-in fixed-point arithmetic including multiply/divide. All this is just from memory, so please take it with a grain of salt.

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Re:The DooM-chip: no CPU, no opcodes, no instruction counter by monocasa on Saturday May 09, 2020 @01:53PM (#23126841)

The SuperFX doesn't really become the main CPU, and has some practical caveats that keep it from doing so. Part of that is that the thing's instruction memory is only 512 bytes.

There are other accelerator chips that do take a more general approach though, like the SA1.

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Re:The DooM-chip: no CPU, no opcodes, no instruction counter by MrBuddyCasino on Saturday May 09, 2020 @04:26PM (#23128023)

To be fair, the SuperFX was the foundation of an actual honest-to-god 32 bit embedded CPU architecture named ARC (Argonaut RISC Core), produced in the billions, because it was apparently quite efficient.

All the more impressive considering the guys making it had no prior experience in CPU design.

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Re:The DooM-chip: no CPU, no opcodes, no instruction counter by monocasa on Saturday May 09, 2020 @05:42PM (#23128534)

Contrary to popular belief the SuperFX and ARC cores are about as different as can be. RISC back then was a buzzword and applied loose and fast; today we wouldn't call SuperFX a RISC chip if not for the decades of describing it as such. ARC is very much a RISC design though.

Totally agreed on how impressive it was though, despite the differences in nomenclature.

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Re:The DooM-chip: no CPU, no opcodes, no instruction counter by mhh__ on Saturday May 09, 2020 @03:34PM (#23127661)

Future? Most high end T&M gear will have an ASIC in it.

FPGAs are already very very prevalent. They aren't too common for hobbyists because although the transistor density in an FPGA has increased the pricing hasn't really followed suit a la regular CPUs - that and the tooling is often comically 1990s

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Re:The DooM-chip: no CPU, no opcodes, no instruction counter by speedgoose on Saturday May 09, 2020 @10:41AM (#23125077)

So JavaScript processors?

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