The Sad Saga of Purism and the Librem 5

Re:The Sad Saga of Purism and the Librem 5 by nsomaru on Sunday October 27, 2019 @01:36PM (#21371149)

It seems that memory is “trained” on boot — the system does POST and checks that critical hardware is responding as expected. PC motherboards have some settings to adjust timing for enthusiasts, but I’m not sure that that’s a trend or even desirable in consumer electronics. So these expected values are probably “burnt in” to the design and difficult to change.

Maybe Purism has a way to do this?

I am not an expert!

[ Parent | on HN ]

Re:The Sad Saga of Purism and the Librem 5 by mondoshawan on Sunday October 27, 2019 @01:40PM (#21371176)

The memory isnt trained -- the PHY is. Its PLL and signal adjustment -- not too dissimilar to how a cable modem "trains" to get settings right for your specific line's characteristics.

PCs have codified it mostly to a set of well known and understood timings that are interchangable, so in that domain its easy. But raw DDR chips used with SOCs is much much harder because you're not beholden to Intel's standards for the PHY or the RAM.

[ Parent | on HN ]